GATE 2023 - Important Concepts, Short cuts, Complete Solutions, Examples and Practice Problems: DIGITAL

Showing posts with label DIGITAL. Show all posts

Previous IES Questions on Number Systems, Binary Codes and 1's and 2's Complements

1. Find the value of ‘r’, if √(41)_r = (7)₁₀. (1988)

2. Find the number of 1’s in an unsigned binary representation of given number. 16₃*9 + 16₂*7 + 16*5 + 3. (1991)

3. Find the number of 1’s in an unsigned binary representation of given number. 3 * 4096 + 15 * 256 + 5 * 16 + 3. (1995)

4. Find the value of ‘r’, if √(224)_r = (13)_r. (1997)
a. 10
b. 8
c. 5
d. 6

5. Convert the following: (1993)
a. 110.011₍₂₎ = X₍₁₀₎
b. 1118₍₁₀₎ = Y_(H)

6. Consider a 3 bit error detection and 1 bit error correction hamming code for 4 bit data. The extra parity bits required would be ________________, and to detect 3 bit error, the minimum distance of the code should be ____________. (1992)

7. In 2’s compliment arithmetic, explain the condition for overflow. (1992)
Answer:

8. Following 7 bit single error correcting Hamming coded message is received as 1000110. Determine if the message is correct, by assuming that at most 1-bit error could be corrected. If the message contains an error, find the bit which is erroneous and give the correct message. (1994)

9. What is the distance of the following code? If the code contains 000000, 010101, 000111, 011001 and 111111. (1995)
a. 2
b. 3
c. 4
d. 1

10. The octal representation of an integer is 342₍₈₎. If this were to be treated as an 8 bit integer in an 8085 based computer, its decimal representation is ________. (1998)
a. 226
b. – 98
c. 76
d. – 30

11. Zero has two representations in___________ (1999)
a. Sign magnitude
b. 1’s complement
c. 2’s complement
d. Both a and b

12. The number 43 in 2’s complement representation is (2000)
a. 01010101
b. 11010101
c. 00101011
d. 10101011

13. 2’s complement representation of (– 539)₁₀ in hexadecimal is (2001)
a. ABE
b. DBC
c. DE5
d. 9E7

14. What is equivalent value for the decimal value 0.25 (2002)
a. 0.1₍₂₎
b. 0.01₍₂₎
c. 0.00111…₍₂₎
d. Can’t be represented precisely

15. 2’s complement representation of decimal value (– 15) is (2002)
a. 1111
b. 11111
c. 111111
d. 10001

16. Assume all numbers are in 2’s complement form, which of the following numbers is divisible by 11111011? (2003)
a. 11100111
b. 11100100
c. 11010111
d. 11011011

17. If 73_(x) = 54_(y) then the possible values of x and y are (2004 & 2011)
a. 8, 16
b. 10,12
c. 9,13
d. 8,11

18. Let A = 11111010 and B = 00001010 be two 8-bit 2’s complement numbers. Their product in 2’complement is (2004)
a. 11000100
b. 10011100
c. 10100101
d. 11010101

19. An 8085 microprocessor executes the following instructions: Two numbers are represented in signed 2’s complement form as P = 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2’s complement form is (2012)
a. 100000111
b. 00000111
c. 11111001
d. 011111001

20. If (11X1Y)₈ = (12C9)₁₆ then the values of X and Y are (2012)
a. 3, 1
b. 5, 7
c. 7, 5
d. 1, 5

21. Binary data is being represented in size of byte and in 2’s complement form. The number of 0’s present in representation of (– 127)₁₀ is (2012)
a. 8
b. 7
c. 6
d. 5

22. The decimal equivalent of binary number 10110.11 is (2013)
a. 16.75
b. 20.75
c. 16.50
d. 22.75

23. Hexadecimal conversion of decimal number 227 will be (2013)
a. A3
b. E3
c. CC
d. C3

24. A seven bit Hamming code is received as 1111101. What is the correct code? (2013)
a. 1101111
b. 1011111
c. 1111111
d. 1111011

25. The number of 1’s present in the binary representation of 15*256 + 5*16 + 3 are (2014)
a. 8
b. 9
c. 10
d. 11

26. Given (135)_X + (144)_X = (323)_X. what is the value of x? (2005 & 2014)
a. 5
b. 3
c. 12
d. 6

27. Which one of the following is correct answer when 11011₍₂₎ is subtracted from 11101₍₂₎ by using 1’s complement method? (2015)
a. 01001
b. 10001
c. 00011
d. 00010

28. An Excess-3 code arithmetic operation is used to perform (2015)
a. Binary addition
b. Binary subtraction
c. BCD addition
d. BCD subtraction

29. Convert the decimal 41.6875 into octal (2015)
a. 51.54
b. 51.13
c. 54.13
d. 51.51

30. The decimal equivalent of binary 110.001 is (2015)
a. 6.25
b. 6.125
c. 62.5
d. 0.612

31. Given (125)_r = (203)₅. The value of r will be (2015)
a. 16
b. 10
c. 8
d. 6

32. The 9’s complement of (25.639)10 is (2015)
a. 74.360
b. 0.6732
c. 6.732
d. 7.436

33. If (2.3)₄ + (1.2)₄ = (Y)₄, then what is the value of Y? (2005)
a. 10.1
b. 10.01
c. 10.2
d. 1.02

34. The number of 1’s in 8-bit representation of – 127 in 2’s complement form is ‘m’ and that in 1’s complement form is ‘n’. What is the value of m:n? (2005)
a. 2:1
b. 1:2
c. 3:1
d. 1:3

35. Assertion (A): There is no overflow after an addition, if one number is positive and the other is negative.
Reason (R): Adding a positive number to a negative number always produces a result, which is smaller than the larger of the two. (2005)
a. Both A and R are individually true and R is the correct explanation of A
b. Both A and R are individually true and R is not the correct explanation of A
c. A is true but R is false
d. A is false but R is true

36. A Gray code is a/an___________ (2005)
a. Binary weight code
b. Arithmetic code
c. Code which exhibits a single bit change between two consecutive codes
d. Alphanumeric code

37. Which of the following subtraction operations do not result in F₁₆?
1. (BA)₁₆ – (AB)₁₆
2. (BC)₁₆ – (CB)₁₆
3. (CB)₁₆ – (BC)₁₆
Select the correct answer using the codes given below: (2006)
a. Only 1 and 2
b. Only 1 and 3
c. Only 2 and 3
d. All, 1 , 2 and 3

38. What is the Gray code word for the binary number 101011? (2006)
a. 101011
b. 110101
c. 011111
d. 111110

39. What is the addition of (– 64)₁₀ and (80)₁₆? (2007)
a. (– 16)₁₀
b. (16)₁₆
c. (1100000)₂
d. (01000000)₂

40. (24)₈ is expressed in Gray code. Which one of the following is correct? (2008)
a. 11000
b. 10100
c. 11110
d. 11111

41. Two 2’s complement numbers having sign bits ‘x’ and ‘y’ are added and the sign bit of the result is ‘z’. which Boolean function indicates overflow condition? (2008)
a. xyz
b. x’y’z’
c. x’y’z + xyz’
d. xy + yz + zx

42. Consider the following statements: (2009)
1. Taking 2’s complement is equivalent to sign change
2. In the 2’s complement representation, the MSB is zero for a positive number
3. In a 4 bit binary representation of a binary number A, A + 1’s complement of A = 2⁴.
Which of the above statements are correct?
a. 1 and 2 only
b. 1 and 3 only
c. 2 and 3 only
d. 1, 2 and 3

43. The hexadecimal representation of (657)₈ is (2010)
a. 1AF_H
b. D78_H
c. D71_H
d. 32F_H

44. Find radix ‘r’, if √(41)_r = 5₍₁₀₎.

45. Find radix, if 302/20 = 12.1

46. In a positional weight system, x and y are two successive digits and xy = 25₍₁₀₎ and yx = 31₍₁₀₎. Determine radix, x and y.

GATE 2015 ECE Digital Circuits (Digital Electronics) - Video Solutions

GATE 2015 ECE – Questions on Digital Circuits with Solutions
1. The circuit shown consists of JK flip flops, each with an active LOW asynchronous reset. The counter corresponding to this circuit is ___________

a. Mod – 5 binary UP counter
b. Mod – 6 binary DOWN counter
c. Mod – 5 binary DOWN counter
d. Mod – 6 binary UP counter

Solution: https://www.youtube.com/watch?v=nSMpwmgMQNc

2. In the circuit shown, D₁, D₂ and D₃ are ideal and inputs E₁, E₂ and E₃ are 0 volts for logic’0’ and 10 volts for logic ‘1’. What logic gate does the circuit represent?

a. 3 input OR gate
b. 3 input NOR gate
c. 3 input AND gate
d. 3 input XOR gate

Solution: https://www.youtube.com/watch?v=lA-egB6GmAo

3. A universal gate can implement any Boolean function by connecting sufficient number of them appropriately. Three gates are shown.

Which one of the following statements is TRUE?
a. Gate 1 is universal gate
b. Gate 2 is universal gate
c. Gate 3 is universal gate
d. None of the gates shown is universal gate

Solution: https://www.youtube.com/watch?v=hJ2MSI9840A

4. A three bit pseudo random number generator is shown. Initially the value of output Y = Y₂Y₁Y₀ is set to 111. The value of output Y after three clock cycles is _________

a. 000
b. 001
c. 010
d. 100

Solution: https://www.youtube.com/watch?v=yeKpE3yuXAk

5. An SR latch is implemented using TTL gates as shown in the figure. The set and reset pulse inputs are provided using the push button switches. It is observed that the circuit fails to work as desired. The SR latch can be made functional by changing

a. NOR gates to NAND gates
b. Inverters to Buffers
c. NOR gates to NAND gates and inverters to buffers
d. 5 volts to ground

Solution: https://www.youtube.com/watch?v=tmpeSu-gXZQ

6. Consider a four bit Digital to Analog converter. The analog value corresponding to a digital signals of values 0000 and 0001 are 0 volts and 0.0625 volts respectively. The analog value (in volts) corresponding to the digital signal 1111 is ______________

Solution: https://www.youtube.com/watch?v=m5TBDdQ7Uwg

7. In a 8085 microprocessor, the shift registers which store the result of an addition and the overflow bit are respectively
a. B and F
b. A and F
c. H and F
d. A and C

Solution: https://www.youtube.com/watch?v=MSKB0ExFE9g

8. A 16 KB memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum number of address lines needed for the row decoder is ______________

Solution: https://www.youtube.com/watch?v=Dmj_YCiX7uE

9. A 3 input majority gate is defined by the logic function M(a,b,c) = ab + bc + ca. Which one of the following gate is represented by the function M(M’(a,b,c),M(a,b,c’),c)?
a. 3 input NAND gate
b. 3 input XOR gate
c. 3 input NOR gate
d. 3 input XNOR gate

Solution: https://www.youtube.com/watch?v=e4wDfHig2cc

10. The Boolean expression F(x,y,z) = x’yz’+xy’z’+xyz’+xyz converted into canonical product of sum (POS) form is ___________

Solution: https://www.youtube.com/watch?v=wFow-s9t4Kw

11. All the logic gates shown in the figure have a propagation delay of 20 ns. Let A=C=0 and B=1 until time t = 0. At t = 0, all the inputs flip (i.e. A=C=1 and B=0) and remain in that state. For t>0, output z=1 for a duration (in 20 ns) of____________

Solution: https://www.youtube.com/watch?v=KywM3DmY8i0

12. A Mod-N counter using a synchronous binary UP counter with asynchronous clear input is shown in the figure. The value of N is_______________

Solution: https://www.youtube.com/watch?v=Cn3ylcDYyug

13. In the figure shown, the output Y is required to be Y = AB+C’D’. The gates G1 and G2 must be _____

a. NOR, OR
b. OR, NAND
c. NAND, OR
d. AND, NAND

Solution: https://www.youtube.com/watch?v=sjtdMcvFqDU

14. In an 8085 microprocessor, which one of the following instructions changes the content of the accumulator?
a. MOV B,M
b. PCHL
c. RNZ
d. SBI BE_H .

Solution: https://www.youtube.com/watch?v=_VVI3E46Nag

15. A function of Boolean variables X,Y and Z is expressed in terms of the min-terms as F(X,Y,Z) = ∑m(1,2,5,6,7). Which one of the product of sums given below is equal to the given function?

Solution: https://www.youtube.com/watch?v=HPihAxUd608

16. The figure shows a binary counter with synchronous clear input. With the decoding logic shown, the counter works as a _______________

a. Mod – 2 counter
b. Mod – 4 counter
c. Mod – 5 counter
d. Mod – 6 counter

Solution: https://www.youtube.com/watch?v=UQ_-E6h7XpE

17. Problem on Design of 1 to 8 De-multiplexer using two 2 to 4 decoders with extra logic gates.

Solution: https://www.youtube.com/watch?v=FYl68C2-fmo

GATE 1991 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. Two dimensional addressing of 256 X 8 bit ROM using 8 to 1 selectors requires _______ (how many?) NAND gates.

Solution: https://www.youtube.com/watch?v=6TdeOmgMTvs

2. The CMOS equivalent of the following nMOS gate (shown in figure) is ________ (Draw the circuit).

Solution: https://www.youtube.com/watch?v=9cSuZt-UrPo

3. A bit stored in a FAMOS device can be erased by ___________.

Solution: https://www.youtube.com/watch?v=mwBl4KpMcLs

4. In the figure, the Boolean expression for the output in terms of inputs A, B and C when the clock CK is high, is given by ____________

Solution: https://www.youtube.com/watch?v=cbPlHJk9zNA

5. The program given below is run on an 8085 based microcomputer system. Determine the contents of the registers: PC, SP, B, C, H, L after a halt instruction is executed.

Answer:
Solution:

6. The four variable function f is given in terms of min-terms as f(A, B, C, D) = ∑m(2,3,8,10,11,12,14,15). Using the K-map minimize the function in the sum of products form. Also, give the realization using only two input NAND gates.

Solution: https://www.youtube.com/watch?v=x_pBfG9g-8w

7. An S-R flip flop can be converted into a T flip flop by connecting ____ to Qbar and _____ to Q.

Solution: https://www.youtube.com/watch?v=sxSeKlxdxSc

GATE 1992 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. The logic realized by the circuit shown in figure is

Solution: https://www.youtube.com/watch?v=ZDCopbfFlqo

2. Choose the correct statement(s) from the following:
a. PROM contains a programmable AND array and a fixed OR array
b. PLA contains a fixed AND array and a programmable OR array
c. PROM contains a fixed AND array and a programmable OR array
d. PLA contains a programmable AND array and a programmable OR array

Solution: https://www.youtube.com/watch?v=z2tByyE5L24

3. The figure shows the circuit of a gate in the Resistor Transistor Logic (RTL) family.

The circuit represents a
a. NAND
b. AND
c. NOR
d. OR

Solution: https://www.youtube.com/watch?v=7EU2sl8UvK8

4. The initial contents of the 4 bit serial in serial out, right shift, shift register shown in figure, are 0110. After three clock pulses are applied, the contents of the shift register will be

a. 0000
b. 0101
c. 1010
d. 1111

Solution: https://www.youtube.com/watch?v=0VtDZLpnhOM

5. In an 8085 microprocessor system with memory mapped I/O,
a. I/O devices have 16 bit addresses
b. I/O devices are accessed using IN and OUT instructions
c. There can be a maximum of 256 input devices and 256 output devices
d. Arithmetic and logic operations can be directly performed with the I/O data.

Solution:

6. The following program is run on 8085 microprocessor:

At the completion of the execution of the program, the program counter of the 8085 contains _____________ and the stack pointer contains _______________.
Answer:
Solution:

7. A new clocked X-Y flip flop is defined with two inputs, X and Y is in addition to the clock input. The flip flop functions as follows:
If XY = 00, the flip flop changes state with each clock pulse
If XY = 01, the flip flop state Q becomes ‘1’ with the next clock pulse
If XY = 10, the flip flop state Q becomes ‘0’ with the next clock pulse
If XY = 11, the change of state occurs with the clock pulse
a. Write the truth table for the XY flip flop
b. Write the excitation table for the XY flip flop
c. It is desirable to convert a J-K flip flop into X-Y flip flop by adding some external gates, if necessary. Draw a circuit to show how you will implement in X-Y flip flop using a J-K flip flop.

Solution: https://www.youtube.com/watch?v=c8PZBGHCGDQ

8. Dual slope integration type analog to digital converter provide
a. Higher speeds compared to all other types of A/D converters
b. Very good accuracy without putting extreme requirements on component stability
c. Good rejection of power supply hum
d. Better resolution compared to all other types of A/D converters for the same number of bits.

Solution: https://www.youtube.com/watch?v=aN33UvCFYhs

9. A combinational circuit has three inputs A, B and C and an output F. F is true only for the following combinations.
A is false and B is true
A is false and C is true
A, B and C are all false
A, B and C are all true
a. Write the truth table for F. Use convention, true = 1 and false = 0.
b. Write the simplified expression for F as a sum of products.
c. Write the simplified expression for F as a product of sums.
d. Draw the logic circuit implementation of F using the minimum number of 2 input NAND gates only.

Solution: https://www.youtube.com/watch?v=woAddE4waaU

10. Figure shows the memory circuit of 8085 microprocessor.

a. What is the total size of the memory in the circuit?
b. What are the beginning and ending addresses of the memory in chip 1?
c. What are the beginning and ending addresses of the memory in chip 2?
d. Are the memory chips in the circuit ROM or RAM?
e. How will you replace the two NAND gates I the circuit with one 3 to 8 decoder without changing the memory size or the memory addresses? Assume that the decoder has one active high enable E₁ and one active low enable E₂.

Solution: https://www.youtube.com/watch?v=ZhLawfMasrY

GATE 1993 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. For the logic circuit shown in figure, the output Y is equal to

Solution: https://www.youtube.com/watch?v=yv328aRJc8o

2. The truth table for the output Y in terms of three inputs A, B and C are given. Draw a logic circuit realization using only NOR gates.

Solution: https://www.youtube.com/watch?v=TVdLzstLObk

3. 2’s complement representation of a 16 bit number (one sign bit and 15 magnitude bits) is FFFF. Its magnitude in decimal representation is
a. 0
b. 1
c. 32,767
d. 65,535

Solution: https://www.youtube.com/watch?v=4ZrEe07cDuQ

4. Boolean expression for the output of XNOR logic gate with inputs A and B is
a. AB’ + A’B
b. (AB)’ + AB
c. (A’ + B)(A + B’)
d. (A’ + B’)(A + B)

Solution: https://www.youtube.com/watch?v=m0IvVDDvYtE

5. A pulse train with a frequency of 1 MHz is counted using a modulo 1024 ripple counter built with JK flip-flops. For proper operation of the counter, the maximum permissible propagation delay per flip flop stage is ____ nsec.

Solution: https://www.youtube.com/watch?v=VXYFD01hQDU

6. In a microprocessor, wait states are used to
a. Make the processor wait during a DMA operation
b. Make the processor wait during an interrupt processing
c. Make the processor wait during a power shutdown
d. Interface slow peripherals to the processor

Solution:

7. Signals A, B, C, D and D’ are available. Using a single 8 to 1 multiplexer and no other gate, implement the Boolean function F(A, B,C, D) = BC + ABD’ + A’C’D

Solution: https://www.youtube.com/watch?v=QQ_Xtq4I5GA

8. A clocked sequential circuit has three states, A, B and C and one input X. As long as the input X is ‘0’, the circuit alternates between the states A and B. if the input X becomes ‘1’(either in state A or in state B), the circuit goes to state C and remains in state C as long as X continues to be 1. The circuit returns to state A if the input becomes ‘0’ once again and from then on repeats its behavior. Assume that the state assignments are A = 00, B = 01 and C = 10.
a. Draw the state diagram of the circuit.
b. Give the state table of the circuit.
c. Draw the circuit using D flip flops.

Solution: https://www.youtube.com/watch?v=uEwqg5Ho7Vo

9. A microprocessor has five address lines [A₄ – A₀] and eight data lines [D₇ – D₀]. An input device A, an output device B, a ROM and a RAM are memory mapped to the microprocessor at the addresses as shown in figure. Devices A and B have four addressable registers each/ RAM has 8 bytes and ROM has 16 bytes.

a. Indicate the address lines to be connected to each device and memory.
b. Obtain the minimum sum of product expression for the chip select (CS) function of each device/memory.

Solution: https://www.youtube.com/watch?v=-WfheT4XoTI

GATE 1994 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. Data can be changed from spatial code to temporal code and vice-versa by using
a. ADCs and DACs
b. Shift registers
c. Synchronous counters
d. Timers

Solution:

2. The output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. The gate is either
a. a NAND or an EX-OR gate
b. a NOR or an EX-NOR gate
c. an OR r an EX-NOR gate
d. an AND or an EX-OR gate

Solution: https://www.youtube.com/watch?v=XLbC1IS__J0

3. A PLA can be used
a. As a microprocessor
b. As a dynamic memory
c. To realize a sequential logic
d. To realize a combinational logic

Solution: https://www.youtube.com/watch?v=fYhAnr1GAf4

4. A dynamic RAM consists of
a. 6 transistors
b. 2 transistors and 2 capacitors
c. 1 transistor and 1 capacitor
d. 2 capacitors only

Solution: https://www.youtube.com/watch?v=3ES3fiMXozE

5. A 2 µsec pulse can be stretched into a 10 msec pulse by using a _______ circuit.

Solution: https://www.youtube.com/watch?v=SHa-rhT0da0

6. Synchronous counters are ________ than the ripple counters.

Solution: https://www.youtube.com/watch?v=1qBwgRPMMU8

7. A ring oscillator consisting of 5 inverters is running at a frequency of 1 MHz. the propagation delay per each gate is ________ nsec.

Solution: https://www.youtube.com/watch?v=aAm-0ZPJhAM

8. The carry look ahead adder is a parallel carry adder where all sum digits are generated directly from the input digits. [TRUE / FALSE]

Solution: https://www.youtube.com/watch?v=84NzHdmRZBw

9. In the output stage of a standard TTL, have a diode between the emitter of the pull-up transistor and the collector of the pull-down transistor. The purpose of the diode is to isolate the output node from the power supply V_CC. [TRUE / FALSE]

Solution: https://www.youtube.com/watch?v=9riuNAKycAQ

10. Match the following ADC’s with their Maximum conversion time for 8 bit digital output.

Solution: https://www.youtube.com/watch?v=w5r0kH5Zqy4

11. A Boolean function, F is given as sum of product (SOP) terms as P = ∑m (3, 4, 5, 6) with A, B and C as inputs. The function, F can be expressed on the karnaugh’s map shown below.

a. Implement this function on an 8:1 MUX
b. What will be the minimized SOP expression for F².

Solution: https://www.youtube.com/watch?v=Xh4KFhn5x-0

12. For the digital circuit shown in the figure, explain what happens at nodes N1, N2, F and F’ when

Solution: https://www.youtube.com/watch?v=yl2GD3Hetm8

GATE 1995 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. The output of the circuit shown in figure is equal to

Solution: https://www.youtube.com/watch?v=f86allXIvS0

2. The minimum number of NAND gates required to implement the Boolean function A + AB’ + AB’C is equal to
a. Zero
b. 1
c. 4
d. 7

Solution: https://www.youtube.com/watch?v=ZxI6mFEl4Hc

3. A switch-tail ring counter is made by using a single D flip flop. The resulting circuit is a
a. SR flip flop
b. JK flip flop
c. D flip flop
d. T flip flop

Solution: https://www.youtube.com/watch?v=NgHdSqy1YKw

4. When a CPU is interrupted, it
a. Stops executing of instructions
b. Acknowledges interrupt and branches of subroutine
c. Acknowledges interrupt and continues
d. Acknowledges interrupt and waits for the next instruction from the interrupt device
Answer:
Solution:

5. The minimum number of MOS transistors required to make a dynamic RAM cell is
a. 1
b. 2
c. 3
d. 4

Solution: https://www.youtube.com/watch?v=0zh1pqRqIPY

6. An SR latch is a
a. Combinational circuit
b. Synchronous sequential circuit
c. One bit memory element
d. One clock delay element

Solution: https://www.youtube.com/watch?v=C8x2OcVIKh8

7. A ‘DMA’ transfer implies
a. Direct transfer of data between memory and accumulator
b. Direct transfer of data between memory and I/O devices without use of µP
c. Transfer of data exclusively within µP registers
d. A fast transfer of data between µP and I/O devices

Solution:

8. An ‘Assembler’ of a microprocessor is used for
a. Assembly of processors in a production line
b. Creation of new program’s using different modules
c. Translation of a program form assembly language to machine language
d. Translation of a higher level language into English text

Solution:

9. For a TTL gate, match the following

Solution: https://www.youtube.com/watch?v=TSWQwxxgVO4

10. For an ADC, match the following

Solution: https://www.youtube.com/watch?v=QS5jEa8E8r4

11. A ROM is used to implement the Boolean functions given below.

a. What is the minimum size of the ROM required?
b. Determine the data in each location of the ROM

Solution: https://www.youtube.com/watch?v=kqnpFRi_gYQ

12. A hypothetical CPU has a parallel address bus, a parallel data bus, a RD and WR active LOW signals. Two ROMs of size 4K words each and two RAMs of sizes 16K and 8K words, respectively, are to be connected to the CPU. The memories are to be so connected that they fill the address space of the CU as per the memory map shown in the figure. Assuming tat chip select signals are active LOW.

a. What is the number of lines in the address bus of the CPU?
b. Determine the values of address X, Y, Z and W as decimal numbers.
c. Using a 2 to 4 decoder and some additional gates, draw a circuit for the decoding logic.

Solution: https://www.youtube.com/watch?v=7xJmGpkvMAo

13. A ‘code converter’ is to be designed to convert from the BCD (5421) code to normal BCD (8421) code. The input BCD combinations for each digit are given below. A block diagram of the converter is shown in figure.
a. Draw K- map for outputs W, X, Y and Z
b. Obtain minimized expression for the outputs W, X, Y and Z

Solution: https://www.youtube.com/watch?v=S-O75HI10qY

GATE 1996 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. Schottky clamping is resorted in TTL gates
a. To reduce propagation delay
b. To increase noise margins
c. To increase packing density
d. To increase fan-out

Solution : https://www.youtube.com/watch?v=WGiADE7PhCE

2. A pulse train can be delayed by a finite number of clock periods using a
a. Serial In Serial Out shift register
b. Serial In Parallel Out shift register
c. Parallel In serial Out shift register
d. Parallel In parallel Out shift register

Solution :

3. A 12 bit ADC is operating with a 1 µsec clock period and the total conversion time is seen to be 14 µsec. the ADC must be of the
a. Flash type
b. Counting type
c. Integrating type
d. Successive Approximation type

Solution : https://www.youtube.com/watch?v=E1CMVfb1z0Y

4. The total number of memory accesses involved (inclusive of the op-code fetch), when an 8085 processor executes the instruction LDA 2003 is
a. 1
b. 2
c. 3
d. 4
Answer:
Solution :

5. A Dynamic RAM cell which holds 5 volts has to be refreshed every 20 ms, so that the stored voltage does not fall by more than 0.5 volts. If the cell has a constant discharge current of 0.1 pA, the storage capacitance of the cell is
a. 4 x 10^-5 Farads
b. 4 x 10^-9 Farads
c. 4 x 10^-12 Farads
d. 4 x 10^-15 Farads

Solution : https://www.youtube.com/watch?v=wCl18UM8Mw8

6. A 10 bit ADC with full scale output voltage of 10.24 volts is designed to have a ±LSB/2 accuracy. If the ADC is calibrated at 25^oC and the operating temperature ranges from 0^oC to 50^oC, then the maximum net temperature coefficient of the ADC should not exceed
a. ± 200 µV/^oC
b. ± 400 µV/^oC
c. ± 600 µV/^oC
d. ± 800 µV/^oC
Answer:
Solution :

7. A memory system of size 26K bytes is required to be designed using memory chips which have 12 address lines and 4 data lines each. The number of such chips required to design the memory system is
a. 2
b. 4
c. 8
d. 13

Solution : https://www.youtube.com/watch?v=HJkyrR0B5F8

8. The following sequence of instructions are executed by an 8085 microprocessor:
1000 LXI SP, 27FFH
1003 CALL 1006
1006 POP H
The contents of the stack pointer (SP) and the HL register pair on completion of execution of these instructions are
a. SP = 27FF, HL = 1003
b. SP = 27FD, HL = 1003
c. SP = 27FF, HL = 1006
d. SP = 27FD, HL = 1006
Answer:
Solution :

9. Given the Boolean function F in three variables R, S and T as
F = R’ST’ + RS’T + RST
a. Express F in the minimum sum of products form
b. Express F in the minimum product of sums form
c. Assuming that both true and complement forms of the input variables are available, draw a circuit to implement F using the minimum number of 2 input NAND gates only.

Solution : https://www.youtube.com/watch?v=sXPb2zE-Q8M

10. A state machine is required to cycle through the following sequence of states:
ABC : 000 -> 010 -> 111 -> 100 -> 011 -> 101.

One possible implementation of the state machine is shown in figure. Specify what signals should be applied to each of the multiplexer inputs.

Solution : https://www.youtube.com/watch?v=fNIP5XoARP0

11. A 4 bit shift register, which shifts 1 bit to the right at every clock pulse, is initialized to values 1000 for (Q₀Q₁Q₂Q₃). The D input is derived from Q₀, Q₂ and Q₃ through two XOR gates as shown in figure.

a. Write the 4 bit values (Q₀Q₁Q₂Q₃) after each clock pulse till the pattern (1000) reappears on (Q₀Q₁Q₂Q₃).
b. To what values should the shift register be initialized so that the pattern (1001) occurs after the first clock pulse?

Solution : https://www.youtube.com/watch?v=w--ZTa4Udk0

12. It is desired to generate the following three Boolean functions using an OR array as shown in figure, where P₁ to P₅ are the product terms in one or more of the variables a, a’, b, b’, c and c’.

Write down the terms P₁, P₂, P₃, P₄ and P₅.

Solution : https://www.youtube.com/watch?v=CgfHjLFHu9g

GATE 1997 ECE Video Solution on Digital Circuits (Digital Electronics)

1. Each cell of a Static Random Access Memory contains
a. 6 MOS transistors
b. 4 MOS transistors and 2 capacitors
c. 2 MOS transistors and 4 capacitors
d. 1 MOS transistor and 1 capacitor

Solution : https://www.youtube.com/watch?v=czmSOocbEuY

2. A two bit binary multiplier can be implemented using
a. 2 input AND gates only
b. 2 input XOR gates and 2 input AND gates only
c. Two 2 input NOR gates and one XOR gate
d. XOR gates and shift registers

Solution : https://www.youtube.com/watch?v=lhcgCBSXH80

3. In standard TTL, the ‘Totem pole’ stage refers to
a. Multi emitter input stage
b. Phase splitter
c. Output buffer
d. Open collector output stage

Solution : https://www.youtube.com/watch?v=vwfJMmfEvMQ

4. The inverter 74ALS04 has the following specifications:
I_OHmax = -0.4 mA
I_OLmax = 8 mA
I_IHmax = 20 µA
I_ILmax = -0.1 mA
The fan out based on the above will be
a. 10
b. 20
c. 60
d. 100

Solution : https://www.youtube.com/watch?v=Yp9f6sedeGc

5. The output of the logic gate shown is

a. 0
b. 1
c. A
d. A’

Solution : https://www.youtube.com/watch?v=k8wTh4Irumg

6. In 8085 µP system, the RST instruction will cause an interrupt
a. Only if an interrupt service routine is not being executed
b. Only if a bit in the interrupt mask is made 0
c. Only if interrupts have been enabled by an EI instruction
d. None of the above
Answer:
Solution :

7. The decoding circuit is shown in figure, has been used to generated the active low chip select signal for a microprocessor peripheral (The address lines are designated as A₀ to A₇ for I/O addresses).

a. 60H – 63H
b. A4 – A7H
c. 30 – 33H
d. 70 – 73H

Solution : https://www.youtube.com/watch?v=lMANeBdPfyg

8. In a JK flip flop, we have J = Q’ and K = 1. Assume the flip flop was initially cleared and then clocked for 6 pulses, the sequence at the Q output will be

a. 010000
b. 011001
c. 010010
d. 010101

Solution : https://www.youtube.com/watch?v=xLkAhzePI90

9. For the NMOS logic gate shown, the logic function implemented is

Solution : https://www.youtube.com/watch?v=PEBwvZKpr_c

10. The Boolean function A + BC is a reduced form of
a. AB + BC
b. (A + B)(A + C)
c. A’B + AB’C
d. (A + C)B

Solution : https://www.youtube.com/watch?v=R64pdVEnmxI

11. The following instructions have been executed by an 8085 µP
For which address will the next instruction be fetched?

a. 6019
b. 6379
c. 6979
d. None of the above
Answer:
Solution :

12. A signed integer has been stored in a byte using the 2’s complement format. We wish to store the same integer in a 16 bit word. We should
a. copy the original byte to the less significant byte of the word and fill the more significant with zeros
b. copy the original byte to the more significant byte of the word and fill the less significant with zeros
c. copy the original byte to the less significant byte of the word and make fit of the more significant byte equal to the most significant bit of the original byte
d.copy the original byte to the less significant byte of the word as well as the more significant byte of the word

Solution : https://www.youtube.com/watch?v=KPDGRwll9LE

13. Match the following :

Solution : https://www.youtube.com/watch?v=LrV0a_yBGng

14. Match the following, while moving data between registers of the 8085 and the stack

Answer:
Solution :

15. Circuit shown in the figure is an NMOS shift register. All transistors are NMOS enhancement type with threshold voltage V_T = 1 volt. Supply used is V_DD = 5 volts.

Two non- overlapping clocks ø₁ and ø₂ are as shown in the figure is and have large pulse widths.
All capacitors are initially discharged and the V_in = 0 volts is applied. If values of capacitors are C₁ = 2 pF and C₂ = 1 pF. Find out voltage V_C2 on capacitor C₂ after ø₂ goes low. Neglect body effect on V_T in your evaluation.

Solution : https://www.youtube.com/watch?v=fa7OqcOcap0

16. A sequence generator is shown in figure. The counter status (Q₀Q₁Q₂) is initialized to 010 using preset/clear inputs.

The clock has a period of 50 ns and transitions take place at the rising clock edge.
a. Give the sequence generates a tQ0 till repeats.
b. What is the repetition rate of the generated sequence?

Solution : https://www.youtube.com/watch?v=iOk6-PX-kY8

17. An 8085 µP uses a 2 MHz crystal. Find the time taken by it to execute the following delay subroutine, inclusive of the call instruction in the calling program.

You are given that a CALL instruction takes 18 cycles of the system clock, PUSH requires 12 cycles and conditional jump takes 10 cycles if the jump is taken and 7 cycles if it is not. All other instructions used above take (3n + 1) clock cycles, where n is the number of accesses to the memory, inclusive of the opcode fetch.

Solution :

GATE 1998 ECE Video Solution on Digital Circuits (Digital Electronics)

1. The minimum number of 2 input NAND gates required to implement the Boolean function Z = AB’C, assuming that A, B and C are available, is
a. Two
b. Three
c. Five
d. Six

Solution : https://www.youtube.com/watch?v=BmAe0gRSr_U

2. The noise margin of a TTL gate is about
a. 0.2 volts
b. 0.4 volts
c. 0.6 volts
d. 0.8 volts

Solution : https://www.youtube.com/watch?v=83z5h70zpHo

3. In the figure shown is A = 1 and B = 1, the input B is now replaced with a sequence 101010....., the output X and Y will be

a. Fixed at 0 and 1 respectively
b. X = 1010... while Y = 0101....
c. X = 1010.... and Y = 1010....
d. Fixed at 1 and 0 respectively

Solution : https://www.youtube.com/watch?v=DPWbOTGp_9I

4. An equivalent 2’s complement representation of the 2’s complement number is 1101 is
a. 110100
b. 001101
c. 110111
d. 111101

Solution : https://www.youtube.com/watch?v=BH31RXqm9Fg

5. An I/O processor control the flow of information between
a. Cache memory and I/O devices
b. Main memory and I/O devices
c. Two I/O devices
d. Cache and main memory

Solution : https://www.youtube.com/watch?v=8SBet_bHUDA

6. Two 2’s complement numbers having sign bits x and y are added and the sign bit of the result is z. Then, the occurrence of overflow is indicated by the Boolean function

Solution : https://www.youtube.com/watch?v=gFp7C8uuwPM

7. The advantage of using a dual slope ADC in a digital voltmeter is that
a. Its conversion time is small
b. Its accuracy is high
c. It gives output in BCD format
d. It does not require a comparator

Solution : https://www.youtube.com/watch?v=SXvefs7NmC4

8. For the identity, AB + A’C + BC = AB + A’C, the dual form is

Solution : https://www.youtube.com/watch?v=j77yeexgCk0

9. An instruction used to set the carry flag in a computer can be classified as
a. Data transfer
b. Arithmetic
c. Logical
d. Program control

Solution : https://www.youtube.com/watch?v=TP3A9M09aho

10. The figure is shows a mod – K counter, here K is equal to

a. 1
b. 2
c. 3
d. 4

Solution : https://www.youtube.com/watch?v=M521k-KIu3U

11. The current I flowing through resistance ‘r’ in the circuit shown is

a. -V/12R
b. V/12R
c. V/6R
d. V/3R

Solution : https://www.youtube.com/watch?v=II-54gb6N5Y

12. The K – map for a Boolean function is shown in the figure. The number of essential prime implicants for this function is

a. 4
b. 5
c. 6
d. 7

Solution : https://www.youtube.com/watch?v=gRJoq9yB70U

13. The mod – 5 counter is shown in the figure counts through states Q₂Q₁Q₀ = 000, 001, 010, 011 and 100.

a. Will the counter lockout if it happen to be in any one of the unused states?
b. Find the maximum rate at which the counter will operate satisfactorily. Assume the propagation delays of flip-flop and AND gate to be t_FF and t_A respectively.

Solution : https://www.youtube.com/watch?v=We99dI2DCJw

14. For the TTL circuit shown in the figure, find the current flowing through the collector of transistor Q₄, when V_o = 0.2 volts. Assume V_CEsat = 0.2 volts, β = 100 and V_BEsat = 0.7 volts. The α of Q₁ in its inverse active mode is 0.01.

Solution : https://www.youtube.com/watch?v=FuVdaxPnOqc

15. Write a short assembly language program, without using any arithmetic instruction, to store hexadecimal 5D in the flag register of 8085 microprocessor. Data in other registers of the processor must not alter upon executing this program.

Solution :

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