GATE 1992 ECE Analog Circuits (Analog Electronics) - Video Solutions

1. An operational amplifier has an offset voltage of 1 mV and is ideal in all other respects. If this amplifier is used in the circuit shown in figure, the output voltage will be (select the nearest value)

a. 1 mV
b. 1 V
c. ± 1 V
d. 0

Answer: C

Solution: https://www.youtube.com/watch?v=xlVOeLMDN9Y


2. The circuit of figure uses an ideal operational amplifier. For small positive values of V_in, the circuit works as

a. Half Wave Rectifier
b. Differentiator
c. Logarithmic amplifier
d. Exponential amplifier

Answer: C

Solution: https://www.youtube.com/watch?v=m8Gt06jgpOM


3. Assume that the operational amplifier in figure is ideal. The current I through the 1 kΩ resistor is _____________

Answer: - 4 mA

Solution: https://www.youtube.com/watch?v=p67ze7lRt58


4. The Two Port Darlington impedance booster of figure uses identical transistors (h_ie = 1 KΩ, h_fe = 100, h_re = h_oe = 0).

Calculate the Z – parameters of the network. Use relevant approximations.

Answer: Z₁₁ = Z₂₁ = 10.3 MΩ and Z₁₂ = Z₂₂ = 1 KΩ

Solution: https://www.youtube.com/watch?v=lCOs9-FKM4I

5. The transistors in the differential amplifier shown in figure are identical with h_fe = 100 and r_e = 25 Ω at 1 mA collector current. The circuit has a CMRR of 100.

a. What is the differential gain of the circuit?
b. What is the common mode gain of the circuit?
c. If DC voltage of 1010 mV and 990 mV are applied to inputs 1 and 2 respectively with reference to ground, what will be the output voltage V_o?

Answer: (a) 20 (b) 0.2 (c) 600 mV

Solution: https://www.youtube.com/watch?v=RJSde9Tr60w


6. Consider the circuit shown in figure. This circuit uses an ideal operational amplifier.

Assuming that the impedance's at nodes A and B do not load the preceding bridge circuit, calculate the output voltage V_o. When (a) R_A = R_B = R_C = R_D = 100 Ω and (b) R_A = R_B = R_C = 100 Ω and R_D = 120 Ω.

Answer: (a) 0 volts (b) - 0.552 volts

Solution: https://www.youtube.com/watch?v=gFiMFpVxFyQ

GATE 1992 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. The logic realized by the circuit shown in figure is

Answer:B

Solution: https://www.youtube.com/watch?v=ZDCopbfFlqo


2. Choose the correct statement(s) from the following:
a. PROM contains a programmable AND array and a fixed OR array
b. PLA contains a fixed AND array and a programmable OR array
c. PROM contains a fixed AND array and a programmable OR array
d. PLA contains a programmable AND array and a programmable OR array

Answer: C & D

Solution: https://www.youtube.com/watch?v=z2tByyE5L24


3. The figure shows the circuit of a gate in the Resistor Transistor Logic (RTL) family.

The circuit represents a
a. NAND
b. AND
c. NOR
d. OR

Answer:D

Solution: https://www.youtube.com/watch?v=7EU2sl8UvK8


4. The initial contents of the 4 bit serial in serial out, right shift, shift register shown in figure, are 0110. After three clock pulses are applied, the contents of the shift register will be

a. 0000
b. 0101
c. 1010
d. 1111

Answer:C

Solution: https://www.youtube.com/watch?v=0VtDZLpnhOM


5. In an 8085 microprocessor system with memory mapped I/O,
a. I/O devices have 16 bit addresses
b. I/O devices are accessed using IN and OUT instructions
c. There can be a maximum of 256 input devices and 256 output devices
d. Arithmetic and logic operations can be directly performed with the I/O data.

Answer:A

Solution:


6. The following program is run on 8085 microprocessor:

At the completion of the execution of the program, the program counter of the 8085 contains _____________ and the stack pointer contains _______________.
Answer:
Solution:


7. A new clocked X-Y flip flop is defined with two inputs, X and Y is in addition to the clock input. The flip flop functions as follows:
If XY = 00, the flip flop changes state with each clock pulse
If XY = 01, the flip flop state Q becomes ‘1’ with the next clock pulse
If XY = 10, the flip flop state Q becomes ‘0’ with the next clock pulse
If XY = 11, the change of state occurs with the clock pulse
a. Write the truth table for the XY flip flop
b. Write the excitation table for the XY flip flop
c. It is desirable to convert a J-K flip flop into X-Y flip flop by adding some external gates, if necessary. Draw a circuit to show how you will implement in X-Y flip flop using a J-K flip flop.

Solution: https://www.youtube.com/watch?v=c8PZBGHCGDQ


8. Dual slope integration type analog to digital converter provide
a. Higher speeds compared to all other types of A/D converters
b. Very good accuracy without putting extreme requirements on component stability
c. Good rejection of power supply hum
d. Better resolution compared to all other types of A/D converters for the same number of bits.

Answer:B & C

Solution: https://www.youtube.com/watch?v=aN33UvCFYhs


9. A combinational circuit has three inputs A, B and C and an output F. F is true only for the following combinations.
A is false and B is true
A is false and C is true
A, B and C are all false
A, B and C are all true
a. Write the truth table for F. Use convention, true = 1 and false = 0.
b. Write the simplified expression for F as a sum of products.
c. Write the simplified expression for F as a product of sums.
d. Draw the logic circuit implementation of F using the minimum number of 2 input NAND gates only.

Solution: https://www.youtube.com/watch?v=woAddE4waaU


10. Figure shows the memory circuit of 8085 microprocessor.

a. What is the total size of the memory in the circuit?
b. What are the beginning and ending addresses of the memory in chip 1?
c. What are the beginning and ending addresses of the memory in chip 2?
d. Are the memory chips in the circuit ROM or RAM?
e. How will you replace the two NAND gates I the circuit with one 3 to 8 decoder without changing the memory size or the memory addresses? Assume that the decoder has one active high enable E₁ and one active low enable E₂.

Solution: https://www.youtube.com/watch?v=ZhLawfMasrY

GATE 1992 EDC Video Solutions - Electronic Devices and Circuits

1. A semiconductor is irradiated with light such that carriers are uniformly generated throughout its volume. The semiconductor is n-type with N_D = 10¹⁹ cm^-3. If the excess electron concentration in the steady state is Δn = 10¹⁵ cm^-3 and if τ_p = 10 µsec (minority carrier life time), then the generation rate due to irradiation is ………….

Answer:A

Solution : https://www.youtube.com/watch?v=1Y5PZaVLBPg


2. A PN junction with a 100 Ω resistor is forward biased so that a current of 100 mA flows. If the voltage across this combination is instantaneously reversed to 10 volts at t = 0, the reverse current that flows through the diode at t = 0 is approximately given by
a. 0 mA
b. 100 mA
c. 200 mA
d. 50 mA

Answer:B

Solution : https://www.youtube.com/watch?v=0T9hYBSFEaM


3. An infrared LED is usually fabricated from
a. Ge
b. Si
c. GaAs
d. GaAsP

Answer:C

Solution : https://www.youtube.com/watch?v=fLphChzvpvo


4. In a transistor having finite β, the forward bias across the base emitter junction is kept constant and the reverse bias across the collector base junction is increased. Neglecting the leakage across the collector base junction and the depletion region generating current, the base current will………….. (Increase / Decrease / Remains constant).

Answer: Decreases

Solution : https://www.youtube.com/watch?v=AUZNcBz04Bk


5. An n-channel JFET has a pinch off voltage V_P = -5 volts, V_DSmax = 20 volts, and g_m = 2 mA/V. The minimum ON resistance is achieved in the JFET for …………

Answer:B

Solution : https://www.youtube.com/watch?v=cYU2g2VQi18


6. The JFET in the circuit shown has an I_DSS = 10 mA and V_P = 5 volts. The value of the resistance R_S for a drain current I_DS of 6.4 mA is …………….. (Select the nearest value).

Answer:A

Solution : https://www.youtube.com/watch?v=-NaCMt2yT8w


7. If the transistors in figure, have high values of β and a V_BE of 0.65 volts, the current I flowing through the 2 KΩ resistance will be…………

Answer:A

Solution : https://www.youtube.com/watch?v=kFEVs7bXj9M

8. The 6 volts Zener diode shown in figure has zero zener resistance and a knee current of 5 mA. The minimum value of R so that the voltage across it does not fall below 6 volts is ……

Answer:B

Solution : https://www.youtube.com/watch?v=j45arOd6cYQ


9. A PNP transistor shown in figure has uniform doping in the emitter, base and collector regions, where in the doping concentrations are 10¹⁹ cm^-3, 10¹⁷ cm^-3 and 10¹⁵ cm^-3 respectively. The minority carrier diffusion lengths in the emitter and the base regions are 5 µm and 100µm respectively.

Assuming low level injection conditions and using law of the junction, calculate the collector current density and the base current density due to base recombination.
[Suitable approximations may be made if required.]
In all the regions of transistors, D_p = 8 cm²/sec, D_n = 16 cm²/sec, n_i = 1.5 X 10¹⁰ cm^-3, KT/q = 26 mV and q = 1.6 X 10^-19 C.
Answer:
Solution :


10. An n-channel MOSFET having a threshold voltage of 2 volts is used in the circuit shown in figure. Initially the transistor is OFF and is in steady state. At time t = 0, a step voltage of magnitude of 4 volts is applied to the input so that the MOSFET turns ON instantaneously.
Draw the equivalent circuit and calculate the time taken to the output V_o to fall to 5 volts.
The device constant of the MOSFET, K = 5 mA/ V², C_DS =0 and C_DG = 0.

Answer: 138 nSec

Solution : https://www.youtube.com/watch?v=ccRFcF5_sQQ