GATE 2023 - Important Concepts, Short cuts, Complete Solutions, Examples and Practice Problems: GATE 1991

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GATE 1991 ECE Analog Circuits (Analog Electronics) - Video Solutions

1. In figure, both transistors are identical and have a high value of β. Take the DC base emitter voltage drop as 0.7 volts and KT/q = 25 mV. The small signal low frequency voltage gain (V_o/V_i) is equal to __________

Solution: https://www.youtube.com/watch?v=u_bD4jaVEY4

2. In order that the circuit of figure works properly as differentiator it should be modified to __________(draw the modified circuit)

Solution: h ttps://www.youtube.com/watch?v=p6HsWwYRHfQ

3. Two non-inverting amplifiers, one having a unity gain and the other having a gain of 20 are made using identical operational amplifiers. As compared to unity gain amplifier, the amplifier with gain 20 has
a. Less negative feedback
b. Greater negative feedback
c. Less bandwidth
d. None of the above

Solution: https://www.youtube.com/watch?v=qT0_HKGt8Q4

4. In the figure, the operational amplifier is ideal and its output can swing between – 15 and + 15 volts.

The input V_i, which is zero for t<0, is switched to 5 volts at the instant t = 0. Given that the output V_o is + 15 volts for t<0, sketch the waveforms of V_o and V_i. You must give the values of important parameters of the sketch.

Solution: https://www.youtube.com/watch?v=Iidn5RkxWz0

5. In figure, the operational amplifier are ideal and their output can swing between – 15 and + 15 volts.

Solution: https://www.youtube.com/watch?v=_kd8uRiv89s

GATE 1991 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. Two dimensional addressing of 256 X 8 bit ROM using 8 to 1 selectors requires _______ (how many?) NAND gates.

Solution: https://www.youtube.com/watch?v=6TdeOmgMTvs

2. The CMOS equivalent of the following nMOS gate (shown in figure) is ________ (Draw the circuit).

Solution: https://www.youtube.com/watch?v=9cSuZt-UrPo

3. A bit stored in a FAMOS device can be erased by ___________.

Solution: https://www.youtube.com/watch?v=mwBl4KpMcLs

4. In the figure, the Boolean expression for the output in terms of inputs A, B and C when the clock CK is high, is given by ____________

Solution: https://www.youtube.com/watch?v=cbPlHJk9zNA

5. The program given below is run on an 8085 based microcomputer system. Determine the contents of the registers: PC, SP, B, C, H, L after a halt instruction is executed.

Answer:
Solution:

6. The four variable function f is given in terms of min-terms as f(A, B, C, D) = ∑m(2,3,8,10,11,12,14,15). Using the K-map minimize the function in the sum of products form. Also, give the realization using only two input NAND gates.

Solution: https://www.youtube.com/watch?v=x_pBfG9g-8w

7. An S-R flip flop can be converted into a T flip flop by connecting ____ to Qbar and _____ to Q.

Solution: https://www.youtube.com/watch?v=sxSeKlxdxSc

GATE 1991 Electronic Devices (EDC) Video solutions

GATE 1991 Electronic Devices (EDC) Video solutions

1. A silicon sample is uniformly doped with 10¹⁶ phosphorous atoms/cm³ and 2 X 10¹⁶ boron atoms/cm³. If all the dopants are fully ionized, the material is ………..

Solution : https://www.youtube.com/watch?v=EiKqkoJSygU

2. An n-type silicon sample, having electron mobility µ_n twice the hole mobility µ_p, is subjected to a steady illumination such that the electron concentration doubles from its thermal equilibrium value, as a result, the conductivity of the sample increases by a factor of ………..

Solution : https://www.youtube.com/watch?v=zxbCiNPkQqY

3. The small signal capacitance of an abrupt P⁺N junction is 1 nF/cm² at zero bias. If the built in voltage is 1 volt, the capacitance at a reverse bias voltage of 99 volts is equal to ……….

Solution : https://www.youtube.com/watch?v=OLLdXgXytOE

4. Referring to the circuit shown, the switch is in position 1 initially and steady state conditions exist from time t=0 to t=t₀. The switch is suddenly thrown into position 2. The current I flowing through the 10K resistor as function of time from t=0 is ………. (Give the sketch showing the magnitudes of the current at t=0, t=t₀ and t=∞)

Solution : https://www.youtube.com/watch?v=DXWskHsBxT0

5. Discrete transistors T1 and T2 having maximum collector current rating of 0.75 Amp are connected in parallel as shown in figure. This combination is treated s a single transistor to carry a total current of 1 Amp, when biased with self bias circuit. When the circuit is switched ON, T1 draws 0.55 Amp and T2 draws 0.45 Amp. If the supply is kept on continuously, ultimately it is very likely that………….

a. T₁ gets damaged and T₂ will be safe
b. Both T₁ and T₂ get damaged
c. Both T₁ and T₂ will be safe
d. T₂ gets damaged and T₁ will be safe

Solution : https://www.youtube.com/watch?v=LsBoz7__O7o

6. The built in potential of the gate junction of an n-channel JFET is 0.5 volts. The drain current saturated at V_DS = 5 volts when V_GS = 0 volts. The pinch off voltage is …………..

Solution : https://www.youtube.com/watch?v=2BeXqVBR1kM

7. In the figure shown, all transistors are identical and have a high value of beta (β). The voltage V_DC is equal to ……………

Solution : https://www.youtube.com/watch?v=Jal7yyjy9Dc

8. In the figure shown, the input V_i is a 100 Hz triangular wave having a peak to peak amplitude of 2 volts and an average value of zero volts. Given that the diode is ideal, the average value of the output voltage V_o is ……………..

Solution : https://www.youtube.com/watch?v=Kxx2qeYfk7E

9. In the figure shown, the n-channel MOSFETs are identical and their current voltage characteristics are given by the following expressions.
Find the current I_DC as shown

Solution : https://www.youtube.com/watch?v=VPgDjeUybI4

10. The current in a forward biased P⁺N junction shown in figure (a) is entirely due to diffusion of holes from x = 0 to x = L. The injected hole concentration distribution in the n-region is linear as shown in figure (b), with P(0) = 10²² per cm³ and L = 10^-3 cm. Determine

a. The current density in the diode, assuming that the diffusion coefficient of holes is 12 cm²/sec.
b. The velocity of holes in the n-region at x = 0.

Solution : https://www.youtube.com/watch?v=fJJ5YtXBBnA

11. It is required to use a JFET of figure as linear resistor. The parameters of the JFET are as follows. W = 100 µm, L = 10 µm and a = 2.5 µm. The doping in the n-layer is N_D = 10¹⁶ cm^-3 and the electron mobility is 1500 cm²/V-sec. the depletion layer width of each junction due to the built in potential is 0.25 µm. The two P⁺ gate regions are connected together externally. The resistances of the regions outside the gate are negligible. Determine the minimum value of the linear resistor which can be realized using this JFET without forward biasing the gate junctions.

Solution : https://www.youtube.com/watch?v=wF6PSs84WuM

GATE 1991 ECE Analog Circuits (Analog Electronics) - Video Solutions

GATE 1991 ECE Video Solutions on Digital Circuits (Digital Electronics)

GATE 1991 Electronic Devices (EDC) Video solutions

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