March 2014 | GATE 2023 - Important Concepts, Short cuts, Complete Solutions, Examples and Practice Problems

GATE 1995 Video Solution on EDC (Electronic Devices and Circuits)

1. The drift velocity of electrons, in silicon
a. Is proportional to the electric field for all values of electric field
b. Is independent of the electric field
c. Increases at low values of electric field and decreases at high values of electric field exhibiting negative differential resistance.
d. Increases linearly with electric field at low values of electric field and gradually saturates at higher values of electric field.

Solution : https://www.youtube.com/watch?v=RJPyzF2-gcc

2. The diffusion potential across a PN junction
a. Decreases with increasing doping concentration
b. Increases with decreasing band gap
c. Does not depend on doping concentration
d. Increases with increase in doping concentrations

Solution : https://www.youtube.com/watch?v=aoeFCtKOuq8

3. The breakdown voltage of a transistor with its base open is BV_CEO, that with emitter open is B_VCBO then
a. BV_CEO = BV_CBO
b. BV_CEO > BV_CBO
c. BV_CEO < BV_CBO
d. BV_CEO not related to BV_CBO

Solution : https://www.youtube.com/watch?v=sX-wk56YviU

4. In a p-type silicon sample, the hole concentration is 2.25 X 10¹⁵ cm^-3. If the intrinsic carrier concentration is 1.5 X 10¹⁰ cm^-3, the electron concentration is
a. Zero
b. 10¹⁰ cm^-3
c. 10⁵ cm^-3
d. 1.5 X 10¹⁰ cm^-3

Solution : https://www.youtube.com/watch?v=j2CvMPiwMW8

5. A Zener diode works on the principle of
a. Tunneling of charge carriers across the junction
b. Thermionic emission
c. Diffusion of charge carriers across the junction
d. Hopping of charge carriers across the junction

Solution : https://www.youtube.com/watch?v=4wq0h-QhMjk

6. A BJT is said to be operating in the saturation region, if
a. Both the junctions are reverse biased
b. Base emitter junction is in reverse biased, and base collector junction is forward biased
c. Base emitter junction is in forward biased, and base collector junction is reverse biased
d. Both the junctions are forward biased

Solution : https://www.youtube.com/watch?v=vafpJ7FB9xE

7. The depletion capacitance, C_J, of an abrupt PN junction with constant doping on either side varies with reverse bias, V_R as

Solution : https://www.youtube.com/watch?v=H7843qbzIOI

8. The Ebers – Moll model is applicable to
a. Bipolar junction transistors
b. nMOS transistors
c. Unipolar Junction transistors
d. Junction field effect transistors

Solution : https://www.youtube.com/watch?v=Xi6e2_7L2Sk

9. The probability that an electron in a metal occupies the Fermi level at any temperature T is (T > 0^oK)
a. 0
b. 1
c. 0.5
d. none

Solution : https://www.youtube.com/watch?v=FgCetVfygC0

10. A transistor having α = 0.99 and VBE = 0.7 volts, in the circuit shown, then the value of the collector current will be…………

Solution : https://www.youtube.com/watch?v=2SJ3DMImgPk

11. The circuit shown in figure, supplies power to an 8 Ω loud speaker. The values of I_C and V_CE for this circuit will be

Solution : https://www.youtube.com/watch?v=ENXTOwOfeoE

12. An n-channel JFET has I_DSS = 1 mA and V_P = -5 volts. Its maximum Transconductance is ……..

Solution : https://www.youtube.com/watch?v=mXxiWhP59fQ

13. In a Bipolar junction transistor, if

Solution : https://www.youtube.com/watch?v=9FDC-pX_y4s

14. In a JFET, if

Solution : https://www.youtube.com/watch?v=Ll4flWTSUbY

15. In an extrinsic semiconductor, if

4. The area of cross section of the semiconductor is increased
5. The doping concentration is increased

Solution : https://www.youtube.com/watch?v=Zk5QaYZDYbs

16. Two identical silicon junction diodes, D1 and D2 are connected back to back as shown. The reverse saturation current I_S of each diode is 10^-8 Amps and the breakdown voltage is 50 volts. Evaluate the voltage V_D1 and V_D2 across the diode D1 and D2 by assuming KT/q to be 25mV.

Solution : https://www.youtube.com/watch?v=i-pu6FQW5w0

17. Calculate the capacitance of a circular MOS capacitor, of 0.5 mm dia and having a SiO₂ layer of 80 mm thickness, under strong accumulation. Assume the relative dielectric constant of SiO₂, Ԑ_r = 4 and Ԑ_o = 8.854 X 10^-14 F/cm. calculate the breakdown voltage of the capacitor if the dielectric strength of SiO₂ film is 10⁷ V/cm.

Solution : https://www.youtube.com/watch?v=tAtC_pW9Bcw

18. The Fermi level of an n-type germanium film is 0.2 eV above the intrinsic Fermi level towards the conduction band. The thickness of the film is 0.5 µm. Calculate the sheet resistance of the film.
Assume :
n_i = 10¹³ cm^-3,
µ_n = 3500 cm²/V-sec,
µ_p = 1500 cm²/V-sec,
KT/q = 26 mV.

Solution : https://www.youtube.com/watch?v=7q9ggl2_4rk

GATE 1994 Electronic Devices (EDC) Video solutions

1. A small concentration of minority carriers is injected into a homogeneous semiconductor crystal at one point. An electric field of 10 V/cm is applied across the crystal and this moves the minority carriers a distance of 1 cm in 20 µsec. The mobility in cm²/volt-sec will be
a. 1000
b. 2000
c. 5000
d. 50000

Solution : https://www.youtube.com/watch?v=Pe9nM75oo1U

2. The threshold voltage of an n-channel MOSFET can be increased by
a. Increasing the channel dopant concentration
b. Reducing the channel dopant concentration
c. Reducing the gate oxide thickness
d. Reducing the channel length

Solution : https://www.youtube.com/watch?v=1C8CrsGguu0

3. The forward dynamic resistance of a junction diode varies ……………… as the forward current.

Solution : https://www.youtube.com/watch?v=HfjrpzG7j8s

4. The transit time of the current carriers through the channel of an FET decides its ……………. characteristics.

Solution : https://www.youtube.com/watch?v=vQJjmHNsn3I

5. A p-type silicon sample has a higher conductivity compared to an n-type sample having the same dopant concentration. (TRUE / FALSE)

Solution : https://www.youtube.com/watch?v=WUKXrsePs-A

6. Channel current is reduced on application of a more positive voltage to the gate of a depletion mode n-channel MOSFET. (TRUE / FALSE)

Solution : https://www.youtube.com/watch?v=W34kWifl15o

7. Match the following :

Solution : https://www.youtube.com/watch?v=GWjW0DVZkSI

8. Show that the minimum conductivity of an extrinsic silicon sample occurs when it is slightly p-type. Calculate the electron and hole concentrations when the conductivity is minimum. Given that µ_n = 1350 cm²/volt-sec, µ_p = 450 cm²/volt-sec, and the intrinsic carrier concentration, n_i = 1.5 X 10¹⁰ cm^-3.

Solution : https://www.youtube.com/watch?v=_O5iozGDyEM

9. In the common emitter amplifier shown, the transistor has a forward current gain of 100, and a base to emitter voltage of 0.6 volts. Assume I_CO to be negligible. Choose value for R₁ and R₃ such that the transistor has a collector current of 1 mA and a collector to emitter voltage of 2.5 volts.

Solution : https://www.youtube.com/watch?v=SjV5f5WC8GU

10. A typical CMOS inverter has the voltage transfer characteristic (VTC) curve as shown in the figure. Evaluate the value of the inverter threshold V_INV, which is the value of the input at which V_o falls by ΔV_o = V_Tn + V_Tp.

Solution : https://www.youtube.com/watch?v=7om91pj90XE

GATE 2012 ECE - Communication Systems Video Solutions

1. In a Base band communication link, frequencies up to 3500 Hz are used for signalling. using a raised cosine pulse with 75% excess bandwidth and for no inter-symbol interference, the maximum possible signalling rate in symbols per second is

a. 1750
b. 2625
c. 4000
d. 5250

Solution : https://www.youtube.com/watch?v=9ut0dpqz1Sc

2.

GATE 1992 EDC Video Solutions - Electronic Devices and Circuits

1. A semiconductor is irradiated with light such that carriers are uniformly generated throughout its volume. The semiconductor is n-type with N_D = 10¹⁹ cm^-3. If the excess electron concentration in the steady state is Δn = 10¹⁵ cm^-3 and if τ_p = 10 µsec (minority carrier life time), then the generation rate due to irradiation is ………….

Solution : https://www.youtube.com/watch?v=1Y5PZaVLBPg

2. A PN junction with a 100 Ω resistor is forward biased so that a current of 100 mA flows. If the voltage across this combination is instantaneously reversed to 10 volts at t = 0, the reverse current that flows through the diode at t = 0 is approximately given by
a. 0 mA
b. 100 mA
c. 200 mA
d. 50 mA

Solution : https://www.youtube.com/watch?v=0T9hYBSFEaM

3. An infrared LED is usually fabricated from
a. Ge
b. Si
c. GaAs
d. GaAsP

Solution : https://www.youtube.com/watch?v=fLphChzvpvo

4. In a transistor having finite β, the forward bias across the base emitter junction is kept constant and the reverse bias across the collector base junction is increased. Neglecting the leakage across the collector base junction and the depletion region generating current, the base current will………….. (Increase / Decrease / Remains constant).

Solution : https://www.youtube.com/watch?v=AUZNcBz04Bk

5. An n-channel JFET has a pinch off voltage V_P = -5 volts, V_DSmax = 20 volts, and g_m = 2 mA/V. The minimum ON resistance is achieved in the JFET for …………

Solution : https://www.youtube.com/watch?v=cYU2g2VQi18

6. The JFET in the circuit shown has an I_DSS = 10 mA and V_P = 5 volts. The value of the resistance R_S for a drain current I_DS of 6.4 mA is …………….. (Select the nearest value).

Solution : https://www.youtube.com/watch?v=-NaCMt2yT8w

7. If the transistors in figure, have high values of β and a V_BE of 0.65 volts, the current I flowing through the 2 KΩ resistance will be…………

Solution : https://www.youtube.com/watch?v=kFEVs7bXj9M

8. The 6 volts Zener diode shown in figure has zero zener resistance and a knee current of 5 mA. The minimum value of R so that the voltage across it does not fall below 6 volts is ……

Solution : https://www.youtube.com/watch?v=j45arOd6cYQ

9. A PNP transistor shown in figure has uniform doping in the emitter, base and collector regions, where in the doping concentrations are 10¹⁹ cm^-3, 10¹⁷ cm^-3 and 10¹⁵ cm^-3 respectively. The minority carrier diffusion lengths in the emitter and the base regions are 5 µm and 100µm respectively.

Assuming low level injection conditions and using law of the junction, calculate the collector current density and the base current density due to base recombination.
[Suitable approximations may be made if required.]
In all the regions of transistors, D_p = 8 cm²/sec, D_n = 16 cm²/sec, n_i = 1.5 X 10¹⁰ cm^-3, KT/q = 26 mV and q = 1.6 X 10^-19 C.
Answer:
Solution :

10. An n-channel MOSFET having a threshold voltage of 2 volts is used in the circuit shown in figure. Initially the transistor is OFF and is in steady state. At time t = 0, a step voltage of magnitude of 4 volts is applied to the input so that the MOSFET turns ON instantaneously.
Draw the equivalent circuit and calculate the time taken to the output V_o to fall to 5 volts.
The device constant of the MOSFET, K = 5 mA/ V², C_DS =0 and C_DG = 0.

Solution : https://www.youtube.com/watch?v=ccRFcF5_sQQ

Video Solutions on Electronics (EDC) from GATE 1993 ECE

1. The wave shape of Vo in the figure will be

Solution : https://www.youtube.com/watch?v=cf2BGUVVFDQ

2. In the figure, the ideal moving iron voltmeter M will read

Solution : https://www.youtube.com/watch?v=5bK9WaHVqaM

3. M in the figure shown is a rectifier type 200 volts full scale voltmeter having a sensitivity of 10 KΩ/volt. What will be the reading in M if the source voltage V_S is a symmetrical square wave of 800 volts peak to peak ?

Answer:

Solution :

4. In the figure, A1, A2 and A3 are ideal ammeters. If A1 reads 5 Amps, A2 reads 12 Amps then A3 should read……..

Solution : https://www.youtube.com/watch?v=rSXdcnxQ3MA

5. The built in potential (Diffusion potential) in a PN junction………
a. Is equal to the difference in the Fermi level of the two sides, expressed in volts
b. Increases with the increase in the doping levels of the two sides
c. Increases with the increase in temperature
d. Is equal to the average of the Fermi levels of the two sides

Solution : https://www.youtube.com/watch?v=h9awFNgU-o8

6. Consider the circuit shown in figure (a). if the diode used here has the V-I characteristics as shown in figure (b), then the output waveform Vo is ………

Solution : https://www.youtube.com/watch?v=B1fq6qREH9A

7. The reverse saturation current of the collector base junction (I_CBO) of a BJT is found to be 10 nA at low collector voltages. The low current amplification factor (α) is 0.98. Find out the change in collector current with its base open (I_CEO) when the collector voltage is increased such that α increases by the 1 %.

Solution : https://www.youtube.com/watch?v=g12aSRc8DW4

GATE 1991 Electronic Devices (EDC) Video solutions

GATE 1991 Electronic Devices (EDC) Video solutions

1. A silicon sample is uniformly doped with 10¹⁶ phosphorous atoms/cm³ and 2 X 10¹⁶ boron atoms/cm³. If all the dopants are fully ionized, the material is ………..

Solution : https://www.youtube.com/watch?v=EiKqkoJSygU

2. An n-type silicon sample, having electron mobility µ_n twice the hole mobility µ_p, is subjected to a steady illumination such that the electron concentration doubles from its thermal equilibrium value, as a result, the conductivity of the sample increases by a factor of ………..

Solution : https://www.youtube.com/watch?v=zxbCiNPkQqY

3. The small signal capacitance of an abrupt P⁺N junction is 1 nF/cm² at zero bias. If the built in voltage is 1 volt, the capacitance at a reverse bias voltage of 99 volts is equal to ……….

Solution : https://www.youtube.com/watch?v=OLLdXgXytOE

4. Referring to the circuit shown, the switch is in position 1 initially and steady state conditions exist from time t=0 to t=t₀. The switch is suddenly thrown into position 2. The current I flowing through the 10K resistor as function of time from t=0 is ………. (Give the sketch showing the magnitudes of the current at t=0, t=t₀ and t=∞)

Solution : https://www.youtube.com/watch?v=DXWskHsBxT0

5. Discrete transistors T1 and T2 having maximum collector current rating of 0.75 Amp are connected in parallel as shown in figure. This combination is treated s a single transistor to carry a total current of 1 Amp, when biased with self bias circuit. When the circuit is switched ON, T1 draws 0.55 Amp and T2 draws 0.45 Amp. If the supply is kept on continuously, ultimately it is very likely that………….

a. T₁ gets damaged and T₂ will be safe
b. Both T₁ and T₂ get damaged
c. Both T₁ and T₂ will be safe
d. T₂ gets damaged and T₁ will be safe

Solution : https://www.youtube.com/watch?v=LsBoz7__O7o

6. The built in potential of the gate junction of an n-channel JFET is 0.5 volts. The drain current saturated at V_DS = 5 volts when V_GS = 0 volts. The pinch off voltage is …………..

Solution : https://www.youtube.com/watch?v=2BeXqVBR1kM

7. In the figure shown, all transistors are identical and have a high value of beta (β). The voltage V_DC is equal to ……………

Solution : https://www.youtube.com/watch?v=Jal7yyjy9Dc

8. In the figure shown, the input V_i is a 100 Hz triangular wave having a peak to peak amplitude of 2 volts and an average value of zero volts. Given that the diode is ideal, the average value of the output voltage V_o is ……………..

Solution : https://www.youtube.com/watch?v=Kxx2qeYfk7E

9. In the figure shown, the n-channel MOSFETs are identical and their current voltage characteristics are given by the following expressions.
Find the current I_DC as shown

Solution : https://www.youtube.com/watch?v=VPgDjeUybI4

10. The current in a forward biased P⁺N junction shown in figure (a) is entirely due to diffusion of holes from x = 0 to x = L. The injected hole concentration distribution in the n-region is linear as shown in figure (b), with P(0) = 10²² per cm³ and L = 10^-3 cm. Determine

a. The current density in the diode, assuming that the diffusion coefficient of holes is 12 cm²/sec.
b. The velocity of holes in the n-region at x = 0.

Solution : https://www.youtube.com/watch?v=fJJ5YtXBBnA

11. It is required to use a JFET of figure as linear resistor. The parameters of the JFET are as follows. W = 100 µm, L = 10 µm and a = 2.5 µm. The doping in the n-layer is N_D = 10¹⁶ cm^-3 and the electron mobility is 1500 cm²/V-sec. the depletion layer width of each junction due to the built in potential is 0.25 µm. The two P⁺ gate regions are connected together externally. The resistances of the regions outside the gate are negligible. Determine the minimum value of the linear resistor which can be realized using this JFET without forward biasing the gate junctions.

Solution : https://www.youtube.com/watch?v=wF6PSs84WuM

Previous GATE Questions on BJT Biasing, Q-point and Finding the operating region of Transistor

The voltage gain Av of the circuit shown below is

(a) 200 (b) 100 (c) 20 (d) 10

Solution :

For a BJT, the common base current gain α = 0.98 and the collector base junction reverse bias saturation current Ico = 0.6 µA. This BJT is connected in the common emitter mode and operated in the active region with a base drive current IB = 20 µA. The collector current IC for this mode of operation is

a. 0.98 mA

b. 0.99 mA

c. 1.0 mA

d. 1.01 mA

For the BJT, Q1 in the circuit shown has β=∞, VBEon = 0.7 volts, VCEsat = 0.7 volts. The switch is initially closed. At time t=0, the switch is opened. The time t at which Q1 leaves the active region is

a. 10 ms

b. 25 ms

c. 50ms

d. 100 ms

List of PSUs, Linking with GATE

The following are the Public Sector Unions (PSUs) that are considering GATE percentile for recruiting jobs under engineering categories.

1 Bharat Petroleum Corporation Limited (BPCL)

2 Power Grid, the central transmission utility (PGCIL)

3 Bharat Electronics Limited (BEL)

4 Bharat Heavy Electricals Limited (BHEL)

5 Metallurgical & Engineering Consultants (MECON)

6 Mineral Exploration Corporation Limited (MECL)

7 National Thermal Power Corporation Limited (NTPC)

8 Gas Authority of India Limited (GAIL)

9 Container Corporation of India Ltd. (CONCOR)

10 Delhi Development Authority (DDA)

11 Indian Oil Corporation Limited (IOCL)

12 Heavy Engineering Corporation Ltd (HECL)

13 National Aluminium Company Limited (NALCO)

14 Hindustan Petroleum Corporation Limited (HPCL)

More government sectors will join with it soon ..

How to Prepare for GATE ? (GATE Preparation Tips)

Preparation for GATE Examination:

There is no requirement of preparing separately for the GATE Exam, if you pursue your university’s educational work well, then that’s more than sufficient. GATE doesn't require any short trick to solve the questions because it provides very sufficient time to complete the paper, and paper is logical so you have to apply basic of your knowledge.

The preparation for the GATE exam should not be initiated in 3rd or 4th year of graduation. Instead it must be started in the 1st year of college. Reading text books and cracking math problems at the reverse of each lesson has to be developed as a habit. This kind of practice gives you solid foundation not just for GATE exam but also for any kind of entrance exam or PSU’s.

Even if you have not started preparation earlier,

1. Concentrate on Solving Previous Year GATE papers (from 1987 to Till date)

2. Don't read too many Text books for a single concept.... One standard text book for one subject...enough

3. Write down the formulas of each subject in a small paper and keep it in your pocket (at least one subject at a time)... and try to look at them ... try to write on paper....

4. For more knowledge, Solve Previous IES, ISRO, DRDL,JTO papers etc....

Careful preparation is the answer to GATE examination.
Do not attend many questions:

In GATE examination you’re not expected to attempt all the questions. If you can attempt just thirty to forty questions on an average with high accuracy you’ll surely succeed in GATE Examination with high scores.

In GATE examination it is not vital, what amount of questions you attempted but what number of questions you correctly attempted. It has to be kept in wits that negative scoring plays a significant part in marking process. When you don’t comprehend any question it is not wise to attempt such questions as lots of times it may lead you to negative scoring. You test your luck by attempting simple question which contain small marks.

Join coaching or not ??

Coaching for preparing GATE is absolutely not required it only provides a direction for the examination but we will set your direction to your Goal. Mock examinations will aid to create the examination atmosphere, so you can join test series of any coaching.

Common Tips While Attempting the Questions:

In GATE examination, the basics & reasoning aptitude proficiency of the aspirant is tested. GATE examination includes negative scoring, so while answering the questions lots of concentration is required.

Similar to any examination it includes a blend of simple, tricky, and extremely hard questions. In GATE examination time is not a big thing. Sufficient quantity of time is offered to attempt the questions. So it’ll be advantage to attempt the questions in two to three rounds.

Attempt your Gate paper in some rounds:

In round one, complete question paper has to be examined and simple and extremely simple questions (easy theory questions and small mathematical problems) should be solved.
In round two & three tricky questions has to be faced and solved.

GATE Reference Books for Instrumentation Engineering

GATE Reference Books for Instrumentation Engineering

SUBJECT	REFERENCE BOOK
MATHEMATICS	Higher Engineering Mathematics – Dr. BS Grewal Advance Engineering Mathematics – Erwin Kreyszig Advance Engineering Mathematics – Dr. HK Dass
SIGNALS, SYSTEMS AND COMMUNICATIONS	Signal & System – Simon Hykin & Barry Van Veen Signals & System Oppenheim & Schafer Discrete Time Signal Processing – Oppenheim & Schafer Digital Signal Processing Proakis Electronic communication system – Kennedy Communication systems – Simon Hykin Principals of communication systems – Taub & Schilling
CONTROL SYSTEMS AND PROCESS CONTROL	Control System Engg. – Nagrath & Gopal Automatic Control Systems – Benjamin C Kuo Modern Control System – Katsuhiko Ogata Design of feedback control system – Hostetter, Savant & Stefani Process Control Instrumentation Technology- Curtis D. Johnson
BASICS OF CIRCUITS AND MEASUREMENT SYSTEMS	Network Analysis –Van Valkenburg Network & System – D Roy & Choudhary Engineering Circuit Analysis – Hayt & Kammerly
ANALOG CIRCUITS	Electronics devices and circuits – Millman & Halkias Electronics devices and circuits – Boylestead Integrated Electronics : Analog & Digital circuits and system – Millman & Halkias Micro Electronics circuit – Sedra & Smith Linear ICs – Gaekwad
DIGITAL CIRCUITS	Digital Electronics – Morris Mano Digital circuits – Taub & Schilling Microprocessor – Ramesh Gaonker
TRANSDUCERS, MECHANICAL MEASUREMENT AND INDUSTRIAL INSTRUMENTATION	Electronic Measurements & Instrumentation – A.K.Sawhney Measurement Systems – Application and Design, Fourth edition- Doebelin E.O
ELECTRICAL AND ELECTRONIC MEASUREMENTS	Electronic Measurements & Instrumentation – A.K.Sawhney
ANALYTICAL, OPTICAL AND BIOMEDICAL INSTRUMENTATION	Electronic Measurements & Instrumentation – A.K.Sawhney Analytical Instrumentation- Bela G. Liptak Introduction to Fiber Optics- Ghatak, A, Thyagarajan, K

GATE Reference Books for Mechanical Engineering

GATE Books for Mechanical Engineering

SL.NO.	SUBJECT	AUTHOR
1.	ENGINEERING Thermodynamics	P.K. Nag Cengel and Boles
2.	I.C. Engine	R.P. Sharma M. L. Mathur, R. P. Sharma
3.	Gas Turbine and Propulsive Systems	PR Khajuria & SP Dubey V ganesan
4.	Fluid Mechanics	D.S. Kumar ,k.l.kumar, Cengel & cimbala, Frank m. white
5.	Compressible Flow	S.M. Yahya John D. Anderson
6.	Heat and Mass Transfer	P. K Nag, JP Hollman, D.S. Kumar, R.C. Sachdeva
7.	Refrigeration and Air Conditioning	P. K Nag , CP Arora Domkundwar
8.	Fluid Machinery	D. S. Kumar , Jagdish Lal, RK Bansal
9.	Theory of Machines	S S Rattan , Thomas Bevan
10.	Mechanical Vibration	V.P Singh , G.K. Grover
11.	Machine Design	Shigley , VB Bhandari
12.	Material Science	WD Callister IP Singh
13.	Production Engg.	P. N. Rao ( Vol I & II) ,Kalpkjian Schmid Amitabh Ghosh & AK Malik
14.	Industrial Engg.	O. P. Khanna Buffa & Sarin
15.	Operations Research	A.M. Natarajan, P.Balasubramani
16.	Strength of Materials	Timoshenko gere, RAMAMRUTHAM, B.C. Punamia

GATE Reference Books for Electrical Engineering

GATE Books for ELECTRICAL ENGINEERING

SL.NO.	SUBJECT	AUTHOR
1.	Electronic Devices & Circuits & Analog Electronics (i)Integrated electronics : Analog and Digital Circuit and system (ii) Microelectronic Circuits (iii) Electronic Devices and Circuits (iv) OP Amp and linear Integrated Circuit (v) Solid State electronic devices (vi) Semiconductor devices	Jacob Millman & Christos C. Halkias Sedra & Smith J.B. Gupta Ramakant A.Gayakwad Streetman and Banerjee S.M.Sze
2.	Theory of Structures/ Analysis of Structure (i) Communication System (ii) An introduction to Analog and Digital Communication (iii) Communication System : Analog and Digital (iv) Modern Digital and Analog Communication System (v) Electronic Communication System	Simon Haykins Simon Haykins Singh and Sapre B.P. Lathi Kennedyand Davis
3.	Signal and System	Oppenheim and Willsky
4.	Optical Fiber Communication	Senior
5.	Satellite Communications	Pratt and Bostian
6.	Monochrome and colour	R.R. Gulati
7.	Control System(i) Control System Engg. (ii) Automatic Control System (iii) Linear Control System	I.G. Nagrath & M. Gopal B.C. Kuo B.S. Manke
8.	Electro Magnetic Theory(i)Elements of Engineering Electromagnetics (ii) Elements of Electromagnetics (iii) Engineering Electromagnetics (iv) Antenna and Wave Propagation	N. N. Rao Sadiku W.H.Hayt K.D. Prasad
9.	Digital Electronics(i) Digital Design (ii) Digital Systems (iii) Modern Digital Electronics	M. Morris Mano Tocci & Widmer R. P. Jain
10.	Computer Engineering(i) Microprocessor Architecture, Programming & Application (ii) Computer Organization and Structure	Ramesh S. Gaonkar Stalling
11.	Microwave Engineering ((i) Microwave Devices and Circuits (ii) Microwave Engineering (iii) Microwave Engineering	Liao Sanjeev Gupta Pozar
12.	Network Theory (i) Networks and Systems (ii) Engineering Circuit Analysis	D. Roy Chaudhary Hayt
13.	Electrical Engineering Material science	S.P. Seth
14.	Measurement and Instrumentation (i) Electrical & Electronic Measurement and Instrumentation (ii) Electronic Instrumentation	A. K. Sahney H. S. Kalsi
15.	Electrical Machine (i) Electrical Machinery (ii) Electrical Machines	PS Bhimra Nagrath & Kothari
16.	Power System (i) Power System Engg. (ii) Electric Power Systems	Nagrath & Kothari CL Wadhwa
17.	Power Electronics	PS Bhimra

Preparation for GATE Examination:

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