Showing posts with label GATE 1995. Show all posts
Showing posts with label GATE 1995. Show all posts

GATE 1995 ECE Analog Circuits (Analog Electronics) - Video Solutions

1. A change in the value of the emitter resistance, RE, in a differential amplifier
a. affects the difference mode gain Ad
b. affects the common mode gain Ac
c. affects both Ad and Ac
d. does not affect both Ad and Ac.
Answer: B
Solution : https://www.youtube.com/watch?v=czxo7TomyPc


2. To obtain very high input and output impedance in a feedback amplifier, the topology mostly used is
a. Voltage Series
b. Current Series
c. Voltage Shunt
d. Current Shunt
Answer: B
Solution : https://www.youtube.com/watch?v=xfuv73dQbBA


3. In the given circuit, if the voltage V+ and V_ are to amplified by the same factor, the value of R should be _________

Answer:33 kΩ
Solution : https://www.youtube.com/watch?v=iyaRnnLhxNI


4. An NPN transistor under forward active mode of operation is biased at Ic = 1 mA, and has a total emitter base capacitance CK of 12 pF, and the base transit time τF of 260 psec. Under this condition, the depletion capacitance of the emitter base junction is _____________
Answer: 2 pF
Solution : https://www.youtube.com/watch?v=faoewgwLY0o


5. An RC coupled amplifier is assumed to have a single pole low frequency transfer function. The maximum lower cutoff frequency allowed for the amplifier to pass 50 Hz square wave with no more than 10% tilt is ______________
Answer: 150 Hz
Solution : https://www.youtube.com/watch?v=Y7Pez6ot4bQ


6. An OP-AMP is used as a zero crossing detector. If the maximum output available from the OP-AMP is ±12 volts peak to peak, and the slew rate of the OP-AMP is 12 V/µsec, then the maximum frequency of the input signal that can be applied without causing a reduction in the peak to peak output is _____________
Answer: 1.59 KHz
Solution : https://www.youtube.com/watch?v=xMs3KYXPxeQ


7. A power amplifier delivers 50W output at 50% efficiency. The ambient temperature is 25oC. If the maximum allowable junction temperature is 150oC, then the maximum thermal resistance øjc that can be tolerated is __________
Answer:2.5 oC/W
Solution : https://www.youtube.com/watch?v=aOpeF9Z9hlQ


8. An amplifier has an open loop gain of 100, and its lower and upper cutoff frequency of 100 Hz and 100 kHz respectively. A feedback network with a feedback factor of 0.99 is connected to the amplifier. The new lower and upper cutoff frequencies are at __________ and ________
Answer: 1 Hz and 10 MHz
Solution : https://www.youtube.com/watch?v=R7lcv_H47gE


9. Match the following:
a) CC amplifier 1) provides voltage gain but no current gain
b) CE amplifier 2) provides current gain but no voltage gain
c) CB amplifier 3) provides neither voltage nor power gain
4) provides neither current nor power gain
5) provides both voltage and current gain
Answer: a-2, b-3, c-1
Solution : https://www.youtube.com/watch?v=6I1uAhJPB10

10. Sketch the output as a function of the input voltage (for negative values) for circuit shown below. Assume ideal operational amplifier and diode forward voltage drop as zero.

Answer:(a) 0 Volts (b) -Vin
Solution: https://www.youtube.com/watch?v=ulb3JFwnZDs


11. The waveform input to the sweep generator circuit shown in figure, is a square wave of period 2 msec and amplitude varying between 0 and 12 volts.

a. Draw the waveform Vo(t), in relation to the input
b. Specify Vo(t) determine the voltage levels and the time constants involved.

Solution: https://www.youtube.com/watch?v=MqLJPriVFVw


12. In the JFET circuit shown, assume that R1//R2 = 1 MΩ and the total stray capacitance at the output to be 20 pF.

Determine the upper cutoff frequency of the amplifier.
Answer: 3.18 MHz
Solution: https://www.youtube.com/watch?v=joc09FhNQI8


13. Show that the circuit shown in figure is double integrator. In other words, prove that the transfer gain is given by Vo(s)/Vs(s) = 1/(SCR)2, assume ideal operational amplifier.

Solution: https://www.youtube.com/watch?v=kIlrli8NFJ0


14. In the amplifier circuit shown, determine the value of R such that Q2 is biased at VCE2 = 7.5 volts. Assume Q1 and Q2 to be identical with VBE = 0.7 volts.

Also determine the small signal input impedance of Q1 and Q2, if both of them have β = 200. Use VT = 26 mV.
Answer: R= 2.72 kΩ, Ri1 < 1 kΩ, Ri2 = 5.65 kΩ
Solution: https://www.youtube.com/watch?v=CiBKrmFWjC8

GATE 1995 ECE Video Solutions on Digital Circuits (Digital Electronics)

1. The output of the circuit shown in figure is equal to

Answer:B
Solution: https://www.youtube.com/watch?v=f86allXIvS0


2. The minimum number of NAND gates required to implement the Boolean function A + AB’ + AB’C is equal to
a. Zero
b. 1
c. 4
d. 7
Answer:B
Solution: https://www.youtube.com/watch?v=ZxI6mFEl4Hc


3. A switch-tail ring counter is made by using a single D flip flop. The resulting circuit is a
a. SR flip flop
b. JK flip flop
c. D flip flop
d. T flip flop
Answer:D
Solution: https://www.youtube.com/watch?v=NgHdSqy1YKw


4. When a CPU is interrupted, it
a. Stops executing of instructions
b. Acknowledges interrupt and branches of subroutine
c. Acknowledges interrupt and continues
d. Acknowledges interrupt and waits for the next instruction from the interrupt device
Answer:
Solution:


5. The minimum number of MOS transistors required to make a dynamic RAM cell is
a. 1
b. 2
c. 3
d. 4
Answer:A
Solution: https://www.youtube.com/watch?v=0zh1pqRqIPY


6. An SR latch is a
a. Combinational circuit
b. Synchronous sequential circuit
c. One bit memory element
d. One clock delay element
Answer:C
Solution: https://www.youtube.com/watch?v=C8x2OcVIKh8


7. A ‘DMA’ transfer implies
a. Direct transfer of data between memory and accumulator
b. Direct transfer of data between memory and I/O devices without use of µP
c. Transfer of data exclusively within µP registers
d. A fast transfer of data between µP and I/O devices
Answer:B
Solution:


8. An ‘Assembler’ of a microprocessor is used for
a. Assembly of processors in a production line
b. Creation of new program’s using different modules
c. Translation of a program form assembly language to machine language
d. Translation of a higher level language into English text
Answer:C
Solution:


9. For a TTL gate, match the following

Answer: a-1, b-4, c-3, d-5
Solution: https://www.youtube.com/watch?v=TSWQwxxgVO4


10. For an ADC, match the following

Answer: a-4, b-3, c-2
Solution: https://www.youtube.com/watch?v=QS5jEa8E8r4


11. A ROM is used to implement the Boolean functions given below.

a. What is the minimum size of the ROM required?
b. Determine the data in each location of the ROM

Solution: https://www.youtube.com/watch?v=kqnpFRi_gYQ


12. A hypothetical CPU has a parallel address bus, a parallel data bus, a RD and WR active LOW signals. Two ROMs of size 4K words each and two RAMs of sizes 16K and 8K words, respectively, are to be connected to the CPU. The memories are to be so connected that they fill the address space of the CU as per the memory map shown in the figure. Assuming tat chip select signals are active LOW.

a. What is the number of lines in the address bus of the CPU?
b. Determine the values of address X, Y, Z and W as decimal numbers.
c. Using a 2 to 4 decoder and some additional gates, draw a circuit for the decoding logic.

Solution: https://www.youtube.com/watch?v=7xJmGpkvMAo


13. A ‘code converter’ is to be designed to convert from the BCD (5421) code to normal BCD (8421) code. The input BCD combinations for each digit are given below. A block diagram of the converter is shown in figure.
a. Draw K- map for outputs W, X, Y and Z
b. Obtain minimized expression for the outputs W, X, Y and Z


Solution: https://www.youtube.com/watch?v=S-O75HI10qY

GATE 1995 Video Solution on EDC (Electronic Devices and Circuits)

1. The drift velocity of electrons, in silicon
a. Is proportional to the electric field for all values of electric field
b. Is independent of the electric field
c. Increases at low values of electric field and decreases at high values of electric field exhibiting negative differential resistance.
d. Increases linearly with electric field at low values of electric field and gradually saturates at higher values of electric field.
Answer: D
Solution : https://www.youtube.com/watch?v=RJPyzF2-gcc


2. The diffusion potential across a PN junction
a. Decreases with increasing doping concentration
b. Increases with decreasing band gap
c. Does not depend on doping concentration
d. Increases with increase in doping concentrations
Answer: D
Solution : https://www.youtube.com/watch?v=aoeFCtKOuq8


3. The breakdown voltage of a transistor with its base open is BVCEO, that with emitter open is BVCBO then
a. BVCEO = BVCBO
b. BVCEO > BVCBO
c. BVCEO < BVCBO
d. BVCEO not related to BVCBO
Answer: C
Solution : https://www.youtube.com/watch?v=sX-wk56YviU


4. In a p-type silicon sample, the hole concentration is 2.25 X 1015 cm-3. If the intrinsic carrier concentration is 1.5 X 1010 cm-3, the electron concentration is
a. Zero
b. 1010 cm-3
c. 105 cm-3
d. 1.5 X 1010 cm-3
Answer: C
Solution : https://www.youtube.com/watch?v=j2CvMPiwMW8


5. A Zener diode works on the principle of
a. Tunneling of charge carriers across the junction
b. Thermionic emission
c. Diffusion of charge carriers across the junction
d. Hopping of charge carriers across the junction
Answer: A
Solution : https://www.youtube.com/watch?v=4wq0h-QhMjk


6. A BJT is said to be operating in the saturation region, if
a. Both the junctions are reverse biased
b. Base emitter junction is in reverse biased, and base collector junction is forward biased
c. Base emitter junction is in forward biased, and base collector junction is reverse biased
d. Both the junctions are forward biased
Answer: D
Solution : https://www.youtube.com/watch?v=vafpJ7FB9xE


7. The depletion capacitance, CJ, of an abrupt PN junction with constant doping on either side varies with reverse bias, VR as

Answer: CJ ∞ √VR
Solution : https://www.youtube.com/watch?v=H7843qbzIOI


8. The Ebers – Moll model is applicable to
a. Bipolar junction transistors
b. nMOS transistors
c. Unipolar Junction transistors
d. Junction field effect transistors
Answer: A
Solution : https://www.youtube.com/watch?v=Xi6e2_7L2Sk


9. The probability that an electron in a metal occupies the Fermi level at any temperature T is (T > 0oK)
a. 0
b. 1
c. 0.5
d. none
Answer:B
Solution : https://www.youtube.com/watch?v=FgCetVfygC0


10. A transistor having α = 0.99 and VBE = 0.7 volts, in the circuit shown, then the value of the collector current will be…………

Answer:3.725 mA
Solution : https://www.youtube.com/watch?v=2SJ3DMImgPk


11. The circuit shown in figure, supplies power to an 8 Ω loud speaker. The values of IC and VCE for this circuit will be

Answer: 3.4 Amp and 16.4 Volts
Solution : https://www.youtube.com/watch?v=ENXTOwOfeoE


12. An n-channel JFET has IDSS = 1 mA and VP = -5 volts. Its maximum Transconductance is ……..
Answer: 0.4 mS
Solution : https://www.youtube.com/watch?v=mXxiWhP59fQ


13. In a Bipolar junction transistor, if

Answer: a-3, b-5, c-3
Solution : https://www.youtube.com/watch?v=9FDC-pX_y4s


14. In a JFET, if

Answer: a-3, b-3, c-4
Solution : https://www.youtube.com/watch?v=Ll4flWTSUbY


15. In an extrinsic semiconductor, if
4. The area of cross section of the semiconductor is increased
5. The doping concentration is increased
Answer: a-5, b-5, c-3
Solution : https://www.youtube.com/watch?v=Zk5QaYZDYbs


16. Two identical silicon junction diodes, D1 and D2 are connected back to back as shown. The reverse saturation current IS of each diode is 10-8 Amps and the breakdown voltage is 50 volts. Evaluate the voltage VD1 and VD2 across the diode D1 and D2 by assuming KT/q to be 25mV.

Answer: -4.98 volts and 0.018 volts
Solution : https://www.youtube.com/watch?v=i-pu6FQW5w0


17. Calculate the capacitance of a circular MOS capacitor, of 0.5 mm dia and having a SiO2 layer of 80 mm thickness, under strong accumulation. Assume the relative dielectric constant of SiO2, Ԑr = 4 and Ԑo = 8.854 X 10-14 F/cm. calculate the breakdown voltage of the capacitor if the dielectric strength of SiO2 film is 107 V/cm.
Answer: 80 volts
Solution : https://www.youtube.com/watch?v=tAtC_pW9Bcw


18. The Fermi level of an n-type germanium film is 0.2 eV above the intrinsic Fermi level towards the conduction band. The thickness of the film is 0.5 µm. Calculate the sheet resistance of the film.
Assume :
ni = 1013 cm-3,
µn = 3500 cm2/V-sec,
µp = 1500 cm2/V-sec,
KT/q = 26 mV.
Answer:1.63 kΩ
Solution : https://www.youtube.com/watch?v=7q9ggl2_4rk

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