GATE
1990
1.
Figure shows an RC phase shift oscillator.
Solve
the network to find the minimum value of hfe for the transistor for
oscillations to be possible. Also determine the frequency of such oscillations.
Take C = 0.01 µF and hie = 2 KΩ.
2.
A pick up signal is power amplified using a
complementary symmetry push pull amplifier and fed to a 5 Ω
loud speaker as shown.
The specifications of power transistors are as follows:
ICmax = Maximum collector current = 2 Amps and PCmax
= Maximum power dissipation = 1 Watt.
Find the maximum power delivered to the loud speaker, if the maximum
output voltage subject to OP-AMP voltage limitations is 15 volts.
If the transistors are mounted on a heat sink, so that PCmax
changes to 3 Watts. What will be the new value of the maximum power delivered?
GATE 1991
3.
In the figure, the operational amplifier is
ideal and its output can swing between – 15 and + 15 volts.
The input Vi,
which is zero for t<0, is switched to 5 volts at the instant t = 0. Given
that the output Vo is + 15 volts for t<0, sketch the waveforms of
Vo and Vi. You must give the values of important
parameters of the sketch.
4.
In figure, the operational amplifier are ideal
and their output can swing between – 15 and + 15 volts.
Sketch the waveform of
voltages of V1 and V2 as a function of time. You must
give the values of important parameters of this sketch.
GATE 1992
5.
The Two Port Darlington impedance booster of
figure uses identical transistors (hie = 1 KΩ, hfe = 100, hre
= hoe = 0).
Calculate the Z – parameters of the network. Use
relevant approximations.
6.
The transistors in the differential amplifier
shown in figure are identical with hfe = 100 and re = 25 Ω
at 1 mA collector current. The circuit has a CMRR of 100.
a.
What is the differential gain of the circuit?
b.
What is the common mode gain of the circuit?
c.
If DC voltage of 1010 mV and 990 mV are applied
to inputs 1 and 2 respectively with reference to ground, what will be the
output voltage Vo?
7.
Consider the circuit shown in figure. This
circuit uses an ideal operational amplifier.
Assuming that the impedance's at
nodes A and B do not load the preceding bridge circuit, calculate the output
voltage Vo. When (a) RA
= RB = RC = RD = 100 Ω and (b) RA = RB = RC
= 100 Ω
and RD = 120 Ω.
GATE 1993
8. A JFET with the following parameters is used in a single stage common source amplifier with a load resistance of 100 kΩ. Calculate the high frequency cutoff (upper 3dB frequency) of the amplifier. Given gm = 2 mA/V, Cgd = 2 pF, Cds = 2 pF, rd = 100 kΩ and Cgs = 1 pF.
9.
Find the output voltage Vo in the
following circuit, assuming that the operational amplifier is ideal.
Solution: https://www.youtube.com/watch?v=PEruik14S0I
Solution: https://www.youtube.com/watch?v=PEruik14S0I
GATE 1994
10. Assuming that the amplifier shown in the figure below is a voltage controlled voltage source.
Show that the voltage transfer function of the network is given by
Solution: https://www.youtube.com/watch?v=F5u_wKdvZYI
11.
Calculate the frequency at which zero
transmission is obtained from the Wien-bridge shown below.
12.
Find the output voltage of the following circuit
shown below, assuming ideal operational amplifier behavior.
13.
In the MOSFET amplifier shown in the figure
below, the transistor has µ = 50, rd = 10 kΩ, Cgs = 5 pF, Cgd
= 1 pF and Cds = 2 pF.
Draw a small signal equivalent circuit for
the amplifier for mid band calculate its mid band voltage gain.
GATE 1995
14. Sketch the output as a function of the input voltage (for negative values) for circuit shown below. Assume ideal operational amplifier and diode forward voltage drop as zero.
Solution: https://www.youtube.com/watch?v=ulb3JFwnZDs
15.
The waveform input to the sweep generator
circuit shown in figure, is a square wave of period 2 msec and amplitude
varying between 0 and 12 volts.
a.
Draw the waveform Vo(t), in relation
to the input
b.
Specify Vo(t) determine the voltage
levels and the time constants involved.
16.
In the JFET circuit shown, assume that R1//R2
= 1 MΩ
and the total stray capacitance at the output to be 20 pF.
Determine the upper cutoff frequency of the amplifier.
Determine the upper cutoff frequency of the amplifier.
17.
Show that the circuit shown in figure is double
integrator. In other words, prove that the transfer gain is given by Vo(s)/Vs(s)
= 1/(CRs)2, assume
ideal operational amplifier.
Solution: https://www.youtube.com/watch?v=kIlrli8NFJ0
Solution: https://www.youtube.com/watch?v=kIlrli8NFJ0
18.
In the amplifier circuit shown, determine the
value of R such that Q2 is biased at VCE2 = 7.5 volts.
Assume Q1 and Q2 to be identical with VBE =
0.7 volts and neglect base currents.
Also determine the small signal input
impedance of Q1 and Q2, if both of them have β =
200. Use VT = 26 mV.
GATE 1996
19.
A common emitter amplifier with an external
capacitors CC connected across the base and the collector of the
transistor is shown. Given gm = 5 mA/V, rπ
= 20 kΩ,
Cπ
= 1.5 pF and Cµ = 0.5 pF.
a.
Determine the ac small signal mid band voltage
gain, Vo/Vs.
b.
Determine the upper cutoff frequency fH
of the amplifier.
20.
A resistively loaded and resistively biased
differential amplifier circuit is shown. Neglect base current and assume
matched transistors with VA -> ∞ and β = 100. Use VT = 26
mV, VBE(on) = 0.7 volts and VCE(sat) = 0.1 volts.
a.
Determine the values of RC and R2
to meet the following specifications: double ended differential mode gain =
500, CMRR = 500 and differential mode input resistance of 2 MΩ.
b.
Determine the minimum values of VCC
and VEE such that the transistors remain in the forward active
region under zero signal condition. Assume that the DC common mode input is
zero.
21.
Assuming ideal operational amplifiers, show that
the circuit shown simulates in inductor i.e. show that Vi(S)/Ii(S)
is inductive and write the expression for the effective inductance.
GATE 1997
6. The transistor in the circuit shown is so biased (dc biasing
network is not shown) that the dc collector current, IC = 1 mA and VCC
= 5 volts. The network components have following values:
RC = 2 kΩ, RS = 1.4 kΩ and RE = 100 Ω. The
transistor has β = 100 and a base spreading resistance, rbb’ = 100Ω.
Assume VT = 25 mV.
Evaluate
small signal voltage gain AVS at a frequency of 10 kHz, and input
resistance Ri for two cases:
a.
CE, the bypass capacitor
across RE is 25 µF
b.
The bypass capacitor CE
is removed leaving RE unbypassed
7. Consider the circuit given in the figure is using an ideal
operational amplifier. The characteristics of the diode are given by the
relation I = IS(eqV/KT – 1), where V is the forward
voltage across the diode.
a.
Express Vo as function of
Vi , assuming Vi > 0
b.
If R = 100 kΩ, IS = 1 µA
and VT = 25 mV, find the input voltage Vi for which Vo
= 0.
8. In circuit shown, assume that the operational amplifier is
ideal and that Vo = 0 volts initially. The switch is connected first
to ‘A’ charging C1 to the voltage V. it is then connected to the point
‘B’. This process is repeated 'f' times per second.
a. Calculate the charge transferred per second from node A to
node B.
b. Derive the average rate of change of the output voltage Vo.
c. If the capacitor and the switch are removed and a resistor
is connected between points A and B, find the value of the resistor to get the
same average rate of change of the output voltage?
d. If the repetition rate of the switching action is 104
times per second, C1 = 100pF, C2 = 10pF and V= 10 mV.
What is the average change of the output voltage?
9. An IC 555 chip has been used to construct a pulse generator.
Typical pin connections with components are shown below. It is desired to
generate a square pulse of 10 kHz.
Evaluate
values of RA and RB if the capacitor C has the value of
0.01 µF for the configuration chosen. If necessary you can suggest modification
in the external configuration.
GATE 1998
22.
For the circuit shown,
a.
Draw the transfer characteristics if both diodes
D1 and D2 are ideal.
b.
How would the characteristics change, if D2
is ideal but D1 is non-ideal? Assume D1 has forward
resistance of 10 Ω and a reverse resistance of infinity.
23.
Determine the input impedance of the circuit
shown and investigate if it can be inductive.
24.
Find the value of R’ in the circuit shown for
generating sinusoidal oscillations. Find the frequency of oscillations.
25.
In the circuit shown, determine the resistance Ro
seen by the output terminals. Ignore the effect of R1 and R2.
26.
Implement a monostable multivibrator using the
timer circuit shown in figure. Also determine an expression for ON time ‘T’ of
the output pulse.
GATE 1999
27.
A bipolar junction transistor amplifier is shown
below. Assume that the current source Ibias is ideal, and the transistor
has very large β, rb = 0 and r0 -> ∞.
Determine the ac small signal mid band voltage gain (Vo / Vs),
input resistance (Ri) and output resistance (Ro) of the
circuit. Assume VT = 26 mV.
28.
A JFET having µ = 50 and rd = 10 kΩ is used
in a common source configuration as shown. The JFET capaciances are Cgs
= 5 pF, Cgd = 2 pF and Cds = 2 pF.
Determine the ac small
signal mid band voltage gain (Vo/Vs) and the upper 3 dB
frequency of the circuit.
29.
Neatly sketch and label the DC transfer
characteristic (Vo verses Vin) of the circuit shown, as Vin
varies from – 2 volts to + 2 volts.
Assume ideal operational amplifier and the diodes have a forward voltage of 0.6 volts and zero incremental resistance.
Assume ideal operational amplifier and the diodes have a forward voltage of 0.6 volts and zero incremental resistance.
30.
A transistor LC oscillator circuit is shown
below.
Assume that the transistor has very high value of β(so
that you may neglect rb). Derive an equation governing the circuit operation,
and find the frequency of oscillation. Also state the gain condition required
for oscillation to start.
Solution: This circuit is Colpitts Oscillator using BJT as amplifier. Refer any text book of EDC to know the condition for oscillations. We dont expect this type of questions will come these days....... as it is a 5 mark question in GATE 1999.
GATE 2000
31. a. For the circuit shown, plot Vo under steady state conditions, with and without capacitor C. Assume that the diode is ideal.
Solution: https://www.youtube.com/watch?v=GJXs26_62eE
b. Design a circuit using two ideal diodes, one resistor and two voltage sources that would convert the input voltage to the output voltage as shown in figure. The resistor value need not be specified.
32.
For the amplifier circuit shown, IC =
1.3 mA, RC = 2 kΩ, RE = 500 Ω,
VT = 26 mV, β = 100, VCC = 15 volts, VS = 0.01
sin(ωt)
volts and Cb = Ce = 10 µF.
a.
What is the small signal voltage gain, Vo/VS
b.
What is the approximate voltage gain if Ce
is removed?
c.
What will be the output Vo, if Cb is
short circuited?
33.
For a feedback amplifier, the open loop transfer
function has three poles at 100 k rad/sec, 1 M rad/sec and 10 M rad/sec. The
low frequency open loop gain is 1000 and the feedback factor (β)
is 1. Use Bode plots to determine the phase margin of the amplifier. Is the
amplifier stable?
Solution: Amplifier is Unstable.
34.
Below figure shown is a common base amplifier.
a.
Write expressions for the time constants
associated with the capacitances Cb and Cs.
b.
What is the approximate lower cutoff frequency
of the amplifier?
GATE 2001
35. An emitter follower amplifier is shown below, where Zi is the impedance looking into the base of the transistor and Zo is the impedance looking into the emitter of the transistor.
b.
Obtain an expression for Zi.
c.
Obtain an expression for Zo.
d.
Determine Zi and Zo, if a
capacitor C is connected across R1.
36.
In the circuit shown, assume that the OP-AMP is
ideal.
a.
Obtain an expression for Vo in terms
of Vs, R and the reverse saturation current Is of the
transistor.
b.
If R = 1 Ω, Is = 1 pA and the thermal
voltage VT = 25 mV, then what is the value of the output voltage Vo
for an input voltage Vs of 1 volt?
c.
Suppose that the transistor in the feedback path
is replaced by a PN junction diode with
a reverse saturation current of Is. The P-side of the diode is
connected to node A and the N-side to node B. then what is the expression for Vo
in terms of Vs, R and Is ?
GATE 2002
37.
A triangular voltage waveform Vi(t)
is applied at the input to the circuit shown. Assume the diodes to be ideal.
a.
Determine the output Vo(t)
b.
Neatly sketch the output waveform superimposed
on the input Vi(t) and label the key points.
38.
Below figure shown is a 2 – stage amplifier.
The
transistors Q1 and Q2 are identical with current gain β =
100, further βDC = βac = β. The zener diode Dz
has a break down region and its dynamic resistance rz is zero. The
capacitors C1 and C2 are large and provide negligible
impedance at signal frequencies.
a.
Identify the configuration in each of the
amplifier stages. (i.e. whether CE, CC or CB)
b.
Determine the quiescent quantities of IC1
and VC1.
c.
Determine an expression for the voltage gain Vo/Vs
and determine its value. (Assume VBE = 0.7 volts, ro = ∞
and thermal voltage VT = 25mV)
Solution:
39.
Consider the circuit shown. Assume the
operational amplifier is ideal.
a.
In which mode is the BJT operating (active or
saturation or cutoff)? Justify your answer.
b.
Obtain an expression relating the output current
Io and the input voltage Vi.
c.
Determine Io and Vop if Vi
= 2 volt. Assume β = 99 and VBE = 0.7 volts.
