GATE 2023 - Important Concepts, Short cuts, Complete Solutions, Examples and Practice Problems: EDC

Showing posts with label EDC. Show all posts

GATE 2015 ECE Electron Devices (EDC) - Video Solutions

GATE 2015 (Electron Devices)

1. Which one of the following processes is preferred to form the gate dielectric (SiO₂) of MOSFET?
a. Sputtering
b. Molecular Beam Epitaxy
c. Wet Oxidation
d. Dry Oxidation

Solution : https://www.youtube.com/watch?v=aT-PUfpeyOY

2. In the circuit shown, the BJT has a current gain (β) of 50. For an emitter base voltage V_EB = 600 mV, the emitter collector voltage V_EC (in volts) is_______________

Solution : https://www.youtube.com/watch?v=RoAi_j7vZpo

3. If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE?
a. Current gain will increase
b. Unity gain frequency will increase
c. Emitter base junction capacitance will increase
d. Early voltage will increase

Solution : https://www.youtube.com/watch?v=bdDtbyWDUeM

4. In the circuit shown, assume that the diodes D₁ and D₂ are ideal. The average value of voltage V_ab (in volts), across terminals a and b is ________________

Solution : https://www.youtube.com/watch?v=nK21y4c_m0Q

5. The electric field profile in the depletion region of a PN junction in equilibrium is shown in the figure. Which one of the following is NOT TRUE?

a. The left side of the junction is N-type and the right side is P-type
b. Both the N-type and P-type depletion regions are uniformly doped
c. The potential difference across the depletion region is 700 mV
d. If the P-type region has a doping concentration of 10¹⁵ cm^-3, then the doping concentration in the N-type region will be 10¹⁶ cm^-3

Solution : https://www.youtube.com/watch?v=LNjwCHJv3UE

6. In the circuit shown, the both the enhancement mode NMOS transistors have the following characteristics: K_n = µ_n.C_ox(W/L) = 1 mA/V², V_TN = 1 volt.

Assume that the channel length modulation parameter λ is zero and body is shorted to source. The minimum supply voltage VDD (in volts) needed to ensure that transistor M1 operates in saturation mode of operation is ___________________

Solution : https://www.youtube.com/watch?v=nAvaaApnnao

7. The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be 1 mA at a drain to source voltage of 5 volts. When the drain – source voltage was increased to 6 volts, while keeping gate-source voltage same, the drain current increased to 1.02 mA. Assume that drain to source saturation voltages is much smaller than the applied drain source voltage. The channel length modulation parameter λ (in V^-1) is __________

Solution : https://www.youtube.com/watch?v=4AebD_Jv5C8

8. An NPN BJT having reverse saturation current I_s = 10^-15 A is biased in the forward active region with V_BE =700 mV. The thermal voltage (V_T) is 25 mV and the current gain (β) may vary from 50 to 150 due to manufacturing variations. The maximum emitter current (in µA) is ____________________________

Solution : https://www.youtube.com/watch?v=-Ff_pmSDNlQ

9. A silicon sample is uniformly doped with donor type impurities with a concentration of 10¹⁶ cm^-3. The electron and hole mobilities in the sample are 1200 cm²/V-sec and 400 cm²/V-sec respectively. Assume complete ionization of impurities. The charge of an electron is 1.6x10^-19 C. The resistivity of the sample (in Ω-cm) is _______________

Solution : https://www.youtube.com/watch?v=Zo6ei-B4gX8

10. A region of negative differential resistance is observed in the current voltage characteristics of a silicon PN junction if
a. Both the P-region and N-region are heavily doped
b. The N-region is heavily doped compared to P-region
c. The P-region is heavily doped compared to N-region
d. An intrinsic silicon region is inserted between the P-region and the N-region

Solution : https://www.youtube.com/watch?v=AfBuhR7yT50

11. For the circuit shown, assume ideal diodes. The shape of the output (V_out) for the given sine wave input (V_in) will be ________________

Solution : https://www.youtube.com/watch?v=zvClgr7lhQE

12. In the circuit shown below, the Zener diode is ideal and the Zener voltage is 6 volts. The output voltage V_o (in volts) is _______________

Solution : https://www.youtube.com/watch?v=cUtPNGP5npk

13. For the NMOSFET in the circuit shown, the threshold voltage is V_th greater than zero. The source voltage V_SS is varied from 0 to V_DD. Neglecting the channel length modulation, the drain current I_D as a function of V_SS is represented by

Solution : https://www.youtube.com/watch?v=qipvNgPQNDM

14. For a silicon diode with ling P and N regions, the acceptor and donor impurity concentrations are 1x10¹⁷ cm^-3 and 1x10¹⁵ cm^-3 respectively. The lifetimes of electron in P-region and holes in N-region are both 100 µs. The electron and hole diffusion coefficients are 49 cm²/sec and 36 cm²/sec respectively. Assume thermal voltage is 26 mV, the intrinsic carrier concentration is 1x10¹⁰ cm^-3 and q = 1.6x10^-19 C. When a forward voltage of 208 mV is applied across the diode, the hole current density (in nA/cm²) injected from P-region to N-region is ___________

Solution : https://www.youtube.com/watch?v=aR7Vz7Fm3co

15. A MOSFET in saturation has a drain current of 1 mA for V_DS = 0.5 volts. If the channel length modulation coefficient is 0.05 V^-1, the output resistance (in kΩ) of the MOSFET is ________

Solution : https://www.youtube.com/watch?v=uFmH59NNz6s

16. The built in potential of an abrupt PN junction is 0.75 volts. If its junction capacitance (C_J) at a reverse bias (V_R) of 1.25 volts is 5 pF. The value of C_J (in pF) when V_R = 7.25 volts is _____

Solution : https://www.youtube.com/watch?v=dk28aPHYdnY

17. A piece of silicon is doped uniformly with phosphorous with a doping concentration of 10¹⁶ per cm³. The expected value of mobility verses doping concentration for silicon assuming full dopant ionization is shown below. The charge of an electron is 1.6x10^-19 C. The conductivity (in Simons/cm) of the silicon sample at 300^oK is _______________

Solution : https://www.youtube.com/watch?v=6im7x-zbWH4

18. An N-type silicon sample is uniformly illuminated with light which generates 10²⁰ electron-hole pairs per cm³ per second. The minority carrier lifetime in the sample is 1 µs. In the steady state, the hole concentration in the sample is approximately 10^x, where x is an integer. The value of x is _________________

Solution : https://www.youtube.com/watch?v=Cd_4k0VGFXg

19. In MOS capacitor with an oxide layer thickness of 10 nm. The maximum depletion layer thickness is 100 nm. The permittivity’s of the semiconductor and the oxide layer are ε_s and ε_ox respectively. Assuming ε_s/ε_ox = 3, the ratio of the maximum capacitance to the minimum capacitance of this MOS capacitor is ____________

Solution : https://www.youtube.com/watch?v=eIk6sCXiKbY

20. The energy band diagram and the electron density profile n(x) in a semiconductor are shown in the figures.

Solution : https://www.youtube.com/watch?v=oibHxv4SAs8

21. A DC voltage of 10 volts is applied across an N-type silicon bar having a rectangular cross section and length of 1 cm as shown. The donor doping concentration N_D and the mobility of electron µ_n are 10¹⁶ cm^-3 and 1000 cm²/V-sec respectively. The average time (in µs) taken by the electrons to move from one end of the bar to the other end is _______________

Solution : https://www.youtube.com/watch?v=kOhp3iqtlSk

22. The diode in the circuit given below has V_ON = 0.7 volts but is ideal otherwise. The current (in mA) in the 4 kΩ resistor is __________________

Solution : https://www.youtube.com/watch?v=pk_MWnHnVfo

GATE 2012 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. The I – V characteristics of the diode in the circuit is given below, then the current in the circuit is

a. 10 mA
b. 9.3 mA
c. 6.67 mA
d. 6.2 mA

Solution : https://www.youtube.com/watch?v=I43NtISx1gc

2. The diodes and capacitors shown in the circuit are ideal. The voltage V(t) across the diode D₁ is

Solution : https://www.youtube.com/watch?v=EKgC4523quk

3. In the circuit shown below, the output expression ‘Y’ is

Solution : https://www.youtube.com/watch?v=AOa8cOFX7WA

4. In the CMOS circuit shown, electron and hole motilities are equal, and M₁ and M₂ transistors are equally sized. The device M₁ is in the linear region if

Solution : https://www.youtube.com/watch?v=Geh8HiqWIoU

5. In the three dimensional view of a silicon N channel MOS transistor shown below, δ = 20 nm. The transistor is of width 1 µm. The depletion width formed at every PN junction is 10 nm. The relative permittivity’s of Si and SiO₂ are 11.7 and 3.9 respectively and Ɛ₀ = 8.9 X 10^-12 F/m.

i. The gate – source overlap capacitance is approximately
a. 0.7 fF
b. 0.7 pF
c. 0.35 fF
d. 0.24 fF

ii. The source – body capacitance approximately
a. 2 fF
b. 7 fF
c. 2 pF
d. 7 pF

Solution : https://www.youtube.com/watch?v=60X82BxUfd8

GATE 2014 ECE Video Solutions on EDC (Electronic Devices and Circuits)

Set – 1 (15th February 2014 (Forenoon))

1. When the optical power incident on a photo diode is 10 µW and the responsivity is 0.8 A/W, the photo current generated (in µA) is ____________.

Solution : https://www.youtube.com/watch?v=FdWts4kUgOI

2. In the figure, assume that the forward voltage drops to the PN diode D₁ and Schottky diode D₂ are 0.7 volts and 0.3 volts respectively. If ON denotes conducting state of the diode and OFF denotes the non conducting state of the diode, then in the circuit,

a. Both are ON
b. D₁ is ON and D₂ is OFF
c. Both are OFF
d. D₁ is OFF and D₂ is ON

Solution : https://www.youtube.com/watch?v=qteoesfhVco

3. If the fixed positive charges are present in the gate oxide of an N channel enhancement type MOSFET, it will lead to
a. a decrease in the threshold voltage
b. channel length modulation
c. an increase in substrate leakage current
d. an increase in accumulation capacitance

Solution : https://www.youtube.com/watch?v=em0VvbA7po4

4. A good current buffer has
a. Low input impedance and low output impedance
b. Low input impedance and high output impedance
c. high input impedance and low output impedance
d. high input impedance and high output impedance

Solution : https://www.youtube.com/watch?v=vdYmByP9zYY

5. A BJT is biased in forward active mode. Assume V_BE = 0.7 volts, KT/q = 25 mV and reverse saturation current I_S = 10^-13 Amp. The Transconductance of the BJT (in mA/volt) is…..

Solution : https://www.youtube.com/watch?v=nAh0aTdVp84

6. The doping concentration on the P side and N side of a silicon diode are 1x10¹⁶ cm^-3 and 1x10¹⁷ cm^-3 respectively. A forward bias of 0.3 volts is applied to the diode. At T = 300^oK, the intrinsic carrier concentration of silicon, n_i = 1.5 x 10¹⁰ cm^-3 and KT/q = 26 mV. The electron concentration at the edge of the depletion region on the P side is
a. 2.3 x 10⁹ cm^-3
b. 1 x 10¹⁶ cm^-3
c. 1 x 10¹⁷ cm^-3
d. 2.25 x 10⁶ cm^-3

Solution : https://www.youtube.com/watch?v=KJ1NDAVBw0U

7. A depletion type N channel MOSFET is biased in its linear region for use as a voltage controlled resistor. Assume threshold voltage V_TH = -0.5 volts, V_GS = 2.0 volts, V_DS = 5 volts, W/L = 100, C_ox = 10^-8 F/cm² and µ_n = 800 cm²/volt-sec. The value of the voltage controlled resistor (in Ω) is …..

Solution : https://www.youtube.com/watch?v=xzUDuBbZUXM

SET – 2 (15th February 2014 (Afternoon))

1. A silicon bar is doped with donor impurities N_D = 2.25 x 10¹⁵ atoms/cm³. Given the intrinsic carrier concentration of silicon at T = 300^oK is n_i = 1.5 x 10¹⁰ cm^-3. Assuming complete impurity ionization, the equilibrium electron and hole concentrations are
a. n_o = 1.5 x 10¹⁶ cm^-3, p₀ = 1.5 x 10⁵ cm^-3
b. n_o = 1.5 x 10¹⁰ cm^-3, p₀ = 1.5 x 10¹⁵ cm^-3
c. n_o = 1.5 x 10¹⁵ cm^-3, p₀ = 1.5 x 10¹⁰ cm^-3
d. n_o = 1.5 x 10¹⁵ cm^-3, p₀ = 1.5 x 10⁵ cm^-3

Solution : https://www.youtube.com/watch?v=zvQFdUBhINg

2. an increase in the base recombination of a BJT will increase
a. the common emitter DC current gain, β
b. the breakdown voltage BV_CEO
c. the unity gain cutoff frequency, f_τ
d. the Transconductance gm

Solution : https://www.youtube.com/watch?v=mY6YLyFzlyc

3. In CMOS technology, shallow P – well or N – well regions can be formed using
a. low pressure chemical vapor deposition
b. low energy sputtering
c. low temperature dry oxidation
d. low energy ion – implantation

Solution : https://www.youtube.com/watch?v=NA-HnsA124g

4. Assume electron charge q = 1.6 x 10^-19C, KT/q = 25 mV and electron mobility µⁿ = 1000 cm²/volt-sec. If the concentration gradient of electrons injected into a P type silicon sample is 1 x 10²¹ per cm^-3, the magnitude of electron diffusion current density (in A/cm²) is ………….

Solution : https://www.youtube.com/watch?v=IBb_zfgQ1AY

5. Consider an abrupt PN junction (at T = 300^oK) shown in the figure. The depletion region width X_n on the N side of the junction is 0.2 µm and the permittivity of silicon (Ԑ_si) is 1.044 x 10^-12 F/cm. At the junction, the approximate value of the peak electric field (in kV/cm) is………..

Solution : https://www.youtube.com/watch?v=6SGWS0QE-dQ

6. When a silicon diode having a doping concentration of N_A = 9 x 10¹⁶ cm^-3 on P side and N_D = 1 x 10¹⁶ cm^-3 on N side is reversed biased, the total depletion width is found to be 3 µm. Given that the permittivity of silicon is 1.04 x 10^-12 F/cm, the depletion width on the P side and the maximum electric field in the depletion region, respectively, are
a. 2.7 µm and 2.3 x 10⁵ V/cm
b. 0.3 µm and 4.15 x 10⁵ V/cm
c. 0.3 µm and 0.42 x 10⁵ V/cm
d. 2.1 µm and 0.42 x 10⁵ V/cm

Solution : https://www.youtube.com/watch?v=PRyI9roqNbA

7. The diode in the circuit shown, if V_on = 0.7 volts but is ideal otherwise. If V_i = 5 sin(ωt) volts, the minimum and maximum values of V_o (in volts) are, respectively,

a. -5 and 2.7
b. 2.7 and 5
c. -5 and 3.85
d. 1.3 and 5

Solution : https://www.youtube.com/watch?v=VNI1bsbW2i8

8. For the N channel MOS transistor shown in the figure, the threshold voltage V_TH is 0.8 volts. Neglect channel length modulation effects. When the drain voltage V_D = 1.6 volts, the drain current I_D was found to be 0.5 mA. If V_D is adjusted to be 2 volts by changing the values of R and V_DD, the new value of I_D (in mA) is

a. 0.625
b. 0.75
c. 1.125
d. 1.5

Solution : https://www.youtube.com/watch?v=wsv90UUqYVY

9. For the MOSFETs shown in the figure, the threshold voltage |V_t| = 2 volts and K = 0.5µc_ox(W/L) = 0.1 mA/V². The value of I_D (in mA) is …………

Solution : https://www.youtube.com/watch?v=abv9XXV0jks

SET – 3 (16th February 2014 (Forenoon))

1. In MOSFET fabrication, the channel length is defined during the process of
a. Isolation oxide growth
b. Channel stop implantation
c. Poly-silicon gate patterning
d. Lithography step leading to the contact pads

Solution : https://www.youtube.com/watch?v=QPQ5hOdbGjE

2. A thin P type silicon sample is uniformly illuminated with light which generates excess carriers. The recombination rate is directly proportional to
a. The minority carrier mobility
b. The minority carrier recombination lifetime
c. The majority carrier concentration
d. The excess minority carrier concentration

Solution : https://www.youtube.com/watch?v=47L011RUiuM

3. At T = 300^oK, the hole mobility of a semiconductor µ_p = 500 cm²/volt-sec and KT/q = 26 mV. The hole diffusion constant D_p in cm²/sec is ………

Solution : https://www.youtube.com/watch?v=cfegvwvHk-A

4. In the circuit shown, the PNP transistor has |V_BE| = 0.7 volts and β = 50. Assume that R_B = 100 KΩ. For V_o to be 5 volts, the value of R_C (in KΩ) is ……..

Solution : https://www.youtube.com/watch?v=ohf5m4r0gzs

5. The donor and acceptor impurities in an abrupt junction silicon diode are 1 x 10¹⁶ cm^-3 and 5 x 10¹⁸ cm^-3, respectively. Assume that the intrinsic carrier concentration in silicon n_i = 1.5 x 10¹⁰ cm^-3 at 300^oK, KT/q = 26 mV and the permittivity of silicon Ԑ_si = 1.04 x 10^-12 F/cm. The built in potential and the depletion width of the diode under thermal equilibrium conditions, respectively are
a. 0.7 volts and 1 x 10^-4 cm
b. 0.86 volts and 1 x 10^-4 cm
c. 0.7 volts and 3.3 x 10^-5 cm
d. 0.86 volts and 3.3 x 10^-5 cm

Solution : https://www.youtube.com/watch?v=W1tmcbDY0-4

6. The slope of the I_D vs. V_GS curve of an N channel MOSFET in linear region is 10^-3 Ω^-1 at V_DS = 0.1 volts. For the same device, neglecting channel length modulation, the slope of the √I_D vs. V_GS curve (in √A/V) under saturation regime is approximately…………….

Solution : https://www.youtube.com/watch?v=rDjsCvkSUtk

7. An ideal MOS capacitor has boron doping concentration of 10¹⁵ cm^-3 in the substrate. When a gate voltage is applied, a depletion region of width 0.5 µm is formed with a surface (channel) potential of 0.2 volts. Given that Ԑ_o = 8.854 x 10^-14 F/cm and the relative permittivity’s of silicon and silicon dioxide are 12 and 4 respectively. The peak electric field (in V/µm) in the oxide region is ……………..

Solution : https://www.youtube.com/watch?v=K4aRAJxegSI

8. In the circuit shown, the silicon BJT has β = 50. Assume V_BE = 0.7 volts and V_CEsat = 0.2 volts. Which one of the following statements is correct?

a. For R_C = 1 kΩ, the BJT operates in the saturation region
b. For R_C = 3 kΩ, the BJT operates in the saturation region
c. For R_C = 20 kΩ, the BJT operates in the cutoff region
d. For R_C = 20 kΩ, the BJT operates in the linear region

Solution : https://www.youtube.com/watch?v=zd_NFD2CN8E

9. For the MOSFET M₁ shown in the figure, assume W/L = 2, V_DD = 2.0 volts, µ_nc_ox = 100 µA/V² and V_TH = 0.5 volts. The transistor M₁ switches from saturation region to linear region when V_in (in volts) is …………..

Solution : https://www.youtube.com/watch?v=AWdemWJenw4

SET - 4 (16th February 2014 (Afternoon))

1. At T = 300^oK, the band gap and the intrinsic carrier concentration of GaAs are 1.42 eV and 10⁶ cm^-3 respectively. In order to generate electron hole pairs in GaAs, which one of the wavelength (λ_c) ranges of incident radiation, is most suitable? (Given that Plank’s constant = 6.62 x 10^-34 J-sec, velocity of light is 3 x 10¹⁰ cm/s and charge of electron is 1.6 x 10^-19C)
a. 0.42 µm < λ_c < 0.87 µm
b. 0.87 µm < λ_c < 1.42 µm
c. 1.42 µm < λ_c < 1.62 µm
d. 1.62 µm < λ_c < 6.62 µm

Solution : https://www.youtube.com/watch?v=NML_fLbqHxw

2. In the figure, ln(ρ_i) is plotted as a function of 1/T, where ρ_i is the intrinsic resistivity of silicon, T is the temperature, and the plot is almost linear. The slope of the line can be used to estimate

a. Band gap energy of silicon
b. Sum of electron and hole mobility in silicon
c. Reciprocal of the sum of electron and hole mobility in silicon
d. Intrinsic carrier concentration of silicon

Solution : https://www.youtube.com/watch?v=nqt3J_lXwuU

3. The cutoff wavelength (in µm) of light that can be used for intrinsic excitation of a semiconductor material of band gap E_g = 1.1 eV is …………..

Solution : https://www.youtube.com/watch?v=bfF2NoqjjDU

4. If the emitter resistance in a common emitter voltage amplifier is not bypassed, it will
a. Reduce both the voltage gain and the input impedance
b. Reduce the voltage gain and increase the input impedance
c. Increase the voltage gain and reduce the input impedance
d. Increase both the voltage gain and the input impedance

Solution : https://www.youtube.com/watch?v=4YjclPDw5lM

5. Consider a silicon sample doped with N_D = 1 x 10¹⁵ /cm³ donor atoms. Assume that the intrinsic carrier concentration n_i = 1.5 x 10¹⁰ cm^-3. If the sample is additionally doped with N_A = 1 x 10¹⁸ cm^-3 acceptor atoms, the approximate number of electrons /cm³ in the sample, at T = 300^oK, will be…………

Solution : https://www.youtube.com/watch?v=T4s49hCIrz0

6. Consider two BJTs biased at the same collector current with area A₁ = 0.2 µm x 0.2 µm and A₂ = 300 µm x 300 µm. assuming that all other device parameters are identical, KT/q = 26 mV, the intrinsic carrier concentration is 1 x 10¹⁰ cm^-3, and q = 1.6 x 10^-19C, the difference between the base emitter voltages (in mV) of the two BJTs (i.e. V_BE1 – V_BE2) is …………….

Solution : https://www.youtube.com/watch?v=R-GogUWvN74

7. An N type semiconductor having uniform doping is biased as shown in the figure.

Solution : https://www.youtube.com/watch?v=XhOs_vAWETw

8. A BJT in a common base configuration is used to amplify a signal received by a 50Ω antenna. Assume KT/q = 25 mV, the value of collector bias current (in mA) required to match the input impedance of the amplifier to the impedance of the antenna is ………..

Solution : https://www.youtube.com/watch?v=HBjqJb91WbE

GATE 2013 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. In IC technology, Dry oxidation(using dry oxygen) as compared to Wet oxidation (using stream or water vapor) produces………..
a. Superior quality oxide with a higher growth rate
b. Inferior quality oxide with a higher growth rate
c. Inferior quality oxide with a lower growth rate
d. Superior quality oxide with a lower growth rate

Solution : https://www.youtube.com/watch?v=EEcf8aHius8

2. For a forward biased PN junction diode, the sequence of events that best describes the mechanism of current flow is
a. Injection and subsequent diffusion and recombination of minority carriers
b. Injection and subsequent drift and generation of minority carriers
c. Extraction and subsequent diffusion and generation of minority carriers
d. Extraction and subsequent drift and recombination of minority carriers

Solution : https://www.youtube.com/watch?v=uADJe1kw8ag

3. In MOSFET operating in saturation region, the channel length modulation effect causes
a. An increase in gate source capacitance
b. A decrease in Transconductance
c. A decrease in unity gain bandwidth product
d. A decrease in output resistance

Solution : https://www.youtube.com/watch?v=9QAOSh8OjSY

4. In the circuit shown below, the knee current of ideal zener diode is 10 mA. To maintain 5 volts across the load R_L, the minimum value of R_L in Ω’s and the minimum power rating of the zener diode in mW respectively are

a. 125 and 125
b. 125 and 250
c. 250 and 125
d. 250 and 250

Solution : https://www.youtube.com/watch?v=_QUM3VQQ78I

5. In the circuit shown below, the silicon NPN transistor Q has a very high value of β. The required value of R₂ in KΩ to produce I_C = 1 mA is

a. 20
b. 30
c. 40
d. 50

Solution : https://www.youtube.com/watch?v=seLmVm94TqY

GATE 2011 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. A silicon PN junction is forward biased with a constant current at room temperature. When the temperature is increased by 10^oC, the forward bias voltage across the PN junction
a. Increases by 60 mV
b. Decreases by 60 mV
c. Increases by 25 mV
d. Decreases by 25 mV

Solution : https://www.youtube.com/watch?v=tOiFRbBhJfY

2. Drift current in semiconductors depends upon
a. Only the electric field
b. Only the carrier concentration gradient
c. Both the electric field and the carrier concentration
d. Both the electric field and the carrier concentration gradient

Solution : https://www.youtube.com/watch?v=fArk1NqX5pU

3. A Zener diode when used in voltage stabilization circuits, is biased in
a. Reverse bias region below the breakdown voltage
b. Reverse breakdown region
c. Forward bias region
d. Forward bias constant current mode

Solution : https://www.youtube.com/watch?v=FiBnG4KSEHU

4. For the BJT Q₁ in the circuit shown, β = ∞, V_BEon = 0.7 volts, V_CEsat = 0.7 volts. The switch is initially closed. At time t=0, the switch is opened. The time at which Q₁ leaves the active region is

a. 10 ms
b. 25 ms
c. 50 ms
d. 100 ms

Solution : https://www.youtube.com/watch?v=yVQ61kRpIsQ

5. In the circuit shown below, for the MOS transistors, µ_nc_ox = 100 µA/V² and the threshold voltage V_T = 1 volt. The voltage V_X at the source of the upper transistor is

a. 1 volt
b. 2 volts
c. 3 volts
d. 0.367 volts

Solution : https://www.youtube.com/watch?v=4J00rSwlU6U

6. For a BJT, the common base current gain α = 0.98 and the collector base junction reverse bias saturation current, I_CO = 0.6 µA. This BJT is connected in the common emitter mode and operated in the active region with a base current (I_B) of 20 µA. The collector current I_C for this mode of operation is
a. 0.98 mA
b. 0.99 mA
c. 1.0 mA
d. 1.01 mA

Solution : https://www.youtube.com/watch?v=V103i22HX0Y

7. Common Data Question:
The channel resistance of an N channel JFET is shown below is 600 Ω, when the full channel thickness (t_OX) of 10 µm is available for conduction. The built in voltage of the gate P⁺N junction is (V_bi) is -1 volts. When the gate to source voltage (V_GS) is 0 volts, the channel is depleted by 1 µm on each side due to the built in voltage and hence the thickness available for conduction is only 8 µm.

i. The channel resistance when V_GS = 0 volts is
a. 480 Ω
b. 600 Ω
c. 750 Ω
d. 1000 Ω

ii. The channel resistance when V_GS = -3 volt is
a. 360 Ω
b. 917 Ω
c. 1000 Ω
d. 3000 Ω

Solution : https://www.youtube.com/watch?v=-Nk0OFZhM-g

GATE 2010 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. At room temperature, a possible value for the mobility of electrons in the inversion layer of a silicon N channel MOSFET is (in cm²/volt-sec)
a. 450
b. 1350
c. 1800
d. 3600

Solution : https://www.youtube.com/watch?v=bXxmszDCh1U

2. The gate oxide in a CMOS process is preferably grown using
a. Wet oxidation
b. Dry oxidation
c. Epitaxial deposition
d. Ion implantation

Solution : https://www.youtube.com/watch?v=7bi7sXWZYEc

3. In a uniformly doped BJT, assume that N_E, N_B and N_C are the emitter, base and collector doping in atoms/cm3 respectively. If the emitter injection efficiency of the BJT is close to unity, which of the following conditions is TRUE?
a. N_E = N_B = N_C
b. N_E >> N_B and N_B > N_C
c. N_E = N_B and N_B < N_C
d. N_E < N_B < N_C

Solution : https://www.youtube.com/watch?v=rGDV4GYPQaQ

4. Compared to a PN junction with N_D=N_A=10¹⁴ per cm³, which one of the following statements is TRUE for a PN junction with N_A=N_D=10²⁰ per cm³?
a. Reverse breakdown voltage is lower and depletion capacitance is lower
b. Reverse breakdown voltage is higher and depletion capacitance is lower
c. Reverse breakdown voltage is lower and depletion capacitance is higher
d. Reverse breakdown voltage is higher and depletion capacitance is higher

Solution : https://www.youtube.com/watch?v=wEzN6onF2AA

5. Linked Answer Question:
The silicon sample with unit cross sectional area shown below is in thermal equilibrium. The following information is given:
T = 300^oK
Electron charge = 1.6x10^-19 C
Thermal voltage = 26 mV
Electron mobility = 1350 cm²/volt-sec

i. The magnitude of the electric field at x = 0.5 µm is
a. 1 KV/cm
b. 5 KV/cm
c. 10 KV/cm
d. 26 KV/cm

ii. The magnitude of the electron drift current density at x = 0.5 µm is
a. 2.16x10⁴ A/cm²
b. 1.08x10⁴ A/cm²
c. 4.32x10³ A/cm²
d. 6.48x10² A/cm²

Solution : https://www.youtube.com/watch?v=jLAgBiAE4so

GATE 2009 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. In an N type silicon crystal at room temperature, which of the following can have a concentration of 4x10¹⁹ cm^-3?
a. Silicon atoms
b. Holes
c. Dopant atoms
d. Valence electrons

Solution : https://www.youtube.com/watch?v=ck2TRWxTGGM

2. The full forms of the abbreviations TTL and CMOS in reference to logic families are
a. Triple Transistor Logic and Chip Metal Oxide semiconductor
b. Tristate Transistor Logic and Chip Metal Oxide semiconductor
c. Transistor Transistor Logic and Complementary Metal Oxide semiconductor
d. Tristate Transistor Logic and Complementary Metal Oxide semiconductor

Solution : https://www.youtube.com/watch?v=v-0BYB0NkMI

3. The ratio of the mobility to the diffusion coefficient in a semiconductor has the units
a. V^-1
b. cm. V^-1
c. V. cm^-1
d. V.sec

Solution : https://www.youtube.com/watch?v=CbvKuwdmwPY

4. In the circuit below, the diode is ideal. The voltage V is given by

a. Min(V_i,1)
b. Max(V_i,1)
c. Min(-V_i,1)
d. Max(-V_i,1)

Solution : https://www.youtube.com/watch?v=yMHePwsPly0

5. Consider the following two statements about the internal conditions in an N channel MOSFET operating in the active region.
S1: the inversion charge decreases from source to drain
S2: the channel potential increases from source to drain
Which of the following is correct?
a. Both are TRUE
b. Both are FALSE
c. Both are TRUE, but S2 is not a reason for S1
d. Both are TRUE, and S2 is a reason for S1.

Solution : https://www.youtube.com/watch?v=qbq2JXNCe_Q

6. Common Data Question:
Consider a silicon PN junction at room temperature having the following parameters:
Doping on the N side = 1x10¹⁷ cm^-3
Depletion width on N side = 0.1 µm
Depletion width on the P side = 1 µm
Intrinsic carrier concentration = 1.4x10¹⁰ cm^-3
Thermal voltage = 26 mV
Permittivity of free space = 8.85x10^-14 F/cm
Dielectric constant of silicon = 12

i. The built in potential of the junction is
a. 0.70 volts
b. 0.76 volts
c. 0.82 volts
d. Cannot be estimated from given data

ii. The peak electric field in the device is
a. 0.15 Mvolts/cm, directed from P region to N region
b. 0.15 Mvolts/cm, directed from N region to P region
c. 1.80 Mvolts/cm, directed from P region to N region
d. 1.80 Mvolts/cm, directed from N region to P region

Solution : https://www.youtube.com/watch?v=ZbOv57yZfQg

7. Linked Questions:
Consider the CMOS circuit shown, where the gate voltage V_G of the N channel MOSFET is increased from zero, while the gate voltage of the P channel MOSFET is kept constant at 3 volts. Assume that, for both transistors, the magnitude of the threshold voltage is 1 volts and the product of the transconductance parameter and the (W/L) ratio i.e. the quantity µc_ox(W/L) is 1 mA/V².

i. For small increase in V_G beyond 1 volt, which of the following gives the correct description of the region of operation of each MOSFET?
a. Both are in saturation region
b. Both are in triode region
c. NMOS is in triode region and PMOS is in saturation region
d. NMOS is in saturation region and PMOS is in triode region

ii. Estimate the output voltage, V_o for V_G = 1.5 volts. (Hint: use the appropriate current voltage equation for each MOSFET, based on the answer to above question)

Solution : https://www.youtube.com/watch?v=_BU3wB8FoBA

GATE 2008 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. Which of the following is NOT associated with a PN junction?
a. Junction capacitance
b. Charge storage capacitance
c. Depletion capacitance
d. Channel length modulation

Solution : https://www.youtube.com/watch?v=7kYKPLc5ujM

2. Which of the following is TRUE?
a. A silicon wafer heavily doped with boron is a P⁺ substrate
b. A silicon wafer lightly doped with boron is a P⁺ substrate
c. A silicon wafer heavily doped with Arsenic is a P⁺ substrate
d. A silicon wafer lightly doped with Arsenic is a P⁺ substrate

Solution : https://www.youtube.com/watch?v=wWLqWJ5JX3U

3. In the following limiter circuit, an input voltage V_i = 10sin100πt applied. Assume that the diode drop is 0.7 volts when it is forward biased. The zener breakdown voltage is 6.8 volts.
The maximum and minimum values of the output voltage respectively are

a. 6.1 volts, -0.7 volts
b. 0.7 volts, -7.5 volts
c. 7.5 volts, -0.7 volts
d. 7.5 volts, -7.5 volts

Solution : https://www.youtube.com/watch?v=2LAYX1bdh5o

4. A silicon wafer has 100nm of oxide on it and is inserted in a furnace at a temperature above 1000^oC for further oxidation in dry oxygen. The oxidation rate
a. Is independent of current oxide thickness and temperature
b. Is independent of current oxide thickness but depends on temperature
c. Slows down as the oxide grows
d. Is zero as the existing oxide prevents further oxidation

Solution : https://www.youtube.com/watch?v=6yl7336P2kA

5. The drain current of a MOSFET in saturation is given by I_D = K(V_GS-V_T)², where K is a constant. The magnitude of the Transconductance g_m is

Solution : https://www.youtube.com/watch?v=pYDNlQanv2g

6. For the circuit shown in the following figure, transistors M1 and M2 are identical NMOS transistors. Assume that M2 is in saturation and the output is unloaded. The I_X is related to I_bias as

Solution : https://www.youtube.com/watch?v=CBXqcvlx97A

7. The measured Transconductance g_m of an NMOS transistor operating in the linear region is plotted against the gate voltage V_G at constant drain voltage V_D. Which of the following figures represents the expected dependence of g_m on V_G?

Solution : https://www.youtube.com/watch?v=KE_MLvt-M-4

8. Two identical NMOS transistors M1 and M2 are connected as shown below. V_bias is chosen so that both transistors are in saturation. The equivalent g_m of the pair is defined to be d_Iout / dV_i at constant V_out, is

a. The sum of individual g_m’s of the transistors
b. The product of individual g_m’s of the transistors
c. Nearly equal to the g_m of M1
d. Nearly equal to g_m1/g_m2 of M2

Solution : https://www.youtube.com/watch?v=oySwKD3Vtjg

9. Silicon is doped with boron to a concentration of 4x10¹⁷atoms/cm³. Assuming the intrinsic carrier concentration of silicon to be 1.5x10¹⁰ cm^-3 and the value of KT/q to be 25 mV at 300^oK. Compared to undoped silicon, the Fermi level of doped silicon
a. Goes down by 0.13 eV
b. Goes up by 0.13 eV
c. Goes down by 0.427 eV
d. Goes up by 0.427 eV

Solution : https://www.youtube.com/watch?v=B4keN9lEFS8

10. The cross section of a JFET is shown in the figure. Let V_G be -2 volts and V_P be the initial pinch off voltage. If the width W is doubled (with other geometric parameters and doping levels remaining the same), then the ratio between the mutual Transconductance of the initial and the modified JFET is

Solution : https://www.youtube.com/watch?v=i1HcEXiUqXA

11. Consider the following assertions.
S1: For zener effect to occur, a very abrupt junction is required
S2: For quantum tunneling to occur, a very narrow energy barrier is required.
Which of the following is correct?
a. Only S2 is true
b. Both are true but S2 is not a reason for S1
c. Both are true but S2 is a reason for S1
d. Both are false

Solution : https://www.youtube.com/watch?v=FMoJlAI1-84

GATE 2007 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. The electron and hole concentrations in an intrinsic semiconductor are n_i per cm³ at 300^oK. Now if acceptor impurities are introduced with a concentration of N_A per cm³ (where N_A > n_i), then electron concentration per cm³ at 300^oK will be
a. n_i
b. n_i + N_A
c. N_A – n_i
d. n_i² / NA

Solution : https://www.youtube.com/watch?v=gwb5IZFKDw0

2. In a P⁺N junction diode under reverse bias, the magnitude of electric field is maximum at
a. The edge of the depletion region on P side
b. The edge of the depletion region on N side
c. The P⁺N junction
d. The center of the depletion region on the N side

Solution : https://www.youtube.com/watch?v=986MG7ote5w

3. The correct full wave rectifier circuit is :

Solution : https://www.youtube.com/watch?v=qzbqzCNqYSA

4. A P⁺N junction has a built in potential of 0.8 volts. The depletion layer width at a reverse bias of 1.2 volts is 2 µm. For a reverse bias of 7.2 volts, the depletion layer width will be
a. 4 µm
b. 4.9µm
c. 8 µm
d. 12 µm

Solution : https://www.youtube.com/watch?v=YhbWy1waleM

5. Group I lists four types of PN junction diodes. Match each device in Group I with one of the option in Group II to indicate the bias condition of that device in its normal mode of operation.

Solution : https://www.youtube.com/watch?v=4KUze2mrsoo

6. The DC current gain (β) of a BJT is 50. Assuming that the emitter injection efficiency is 0.995, the base transport factor is:
a. 0.980
b. 0.985
c. 0.990
d. 0.995

Solution : https://www.youtube.com/watch?v=VlsDefl-uG0

7. Group I lists four different semiconductor devices. Match each device in Group I with its characteristic property in Group II.

Solution : https://www.youtube.com/watch?v=iwERJKn2hUU

8. For the BJT circuit shown, assume that the β of the transistor is very large and V_BE is 0.7 volts. The mode of operation of the BJT is

a. Cut off
b. Saturation
c. Normal active
d. Inverse active

Solution : https://www.youtube.com/watch?v=iXf86EM2YOM

9. In the CMOS inverter circuit shown, if the Transconductance parameters of the NMOS and PMOS transistors are K_n = K_p = µ_nC_ox(W_n/L_n) = µ_pC_ox(W_p/L_p) = 40 µA/V² and their threshold voltages are V_Tn = |V_Tp| = 1 volt, the current I is

a. 0 Amp
b. 25 µA
c. 45 µA
d. 90 µA

Solution : https://www.youtube.com/watch?v=wtboLpHXLOA

10. For the zener diode shown in the figure, the zener voltage at knee is 7 volts, the knee current is negligible and the zener dynamic resistance is 10 Ω. If the input voltage (V_i) range is 10 to 16 volts, the output voltage (V_o) ranges from

Solution : https://www.youtube.com/watch?v=CJ5VHPaFMsg

11. The figure shows the high frequency capacitance – voltage (C – V) characteristics of MOS capacitor having an area of 1x10^-4 cm². Assume that the permittivity of silicon and S_iO₂ are 1x10^-12 and 3.5x10^-13 F/cm respectively.

i. The gate oxide thickness in the MOS capacitor is
a. 50 nm
b. 143 nm
c. 350 nm
d. 1 µm

ii. The maximum depletion layer width in silicon is
a. 0.143 µm
b. 0.857 µm
c. 1 µm
d. 1.143 µm

iii. Consider the following statements about the C – V characteristics plot :
S₁: The MOS capacitor has an N type substrate
S₂: If the positive charges are introduced in the oxide, the C – V plot will shift to the left.
Then which one of the following is TRUE .

Solution : https://www.youtube.com/watch?v=IKyIj6hVTL8

GATE 2006 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. The values of voltage across a tunnel diode (V_D) corresponding to peak and valley currents are V_P and V_V respectively. The range of tunnel diode voltage V_D for which the slope of its I-V characteristics is negative would be
a. V_D < 0
b. 0 ≤ V_D ≤ V_P
c. V_P ≤ V_D ≤ V_V
d. V_D ≥ V_V

Solution : https://www.youtube.com/watch?v=k7NNJYXvEvk

2. The concentration of minority carriers in an extrinsic semiconductor under equilibrium is
a. Directly proportional to the doping concentration
b. Inversely proportional to the doping concentration
c. Directly proportional to the intrinsic concentration
d. Inversely proportional to the intrinsic concentration

Solution : https://www.youtube.com/watch?v=iujDfqtrnyA

3. Under low level injection assumption, the injected minority carrier current for an extrinsic semiconductor is essentially the
a. Diffusion current
b. Drift current
c. Recombination current
d. Induced current

Solution : https://www.youtube.com/watch?v=TYB5k5Y48t4

4. The phenomenon known as “early effect” in a BJT refers to a reduction of the effective base width caused by
a. Electron – hole recombination at the base
b. The reverse biasing of the base collector junction
c. The forward biasing of emitter base junction
d. The early removal of stored base charge during saturation to cutoff switching

Solution : https://www.youtube.com/watch?v=V-2EhtZEJBw

5. An N-channel depletion MOSFET has the following two points on its I_D verses V_GS curve are
(i) V_GS = 0 at I_D = 12 mA and
(ii) V_GS = -6 volts at I_D = 0 mA
Which of the following Q-points will give the highest Transconductance gain for small signals?
a. V_GS = -6 volts
b. V_GS = -3 volts
c. V_GS = 0 volts
d. V_GS = 3 volts

Solution : https://www.youtube.com/watch?v=Kxd4IZqv1vU

6. In the circuit shown below, the switch was connected to position 1 at t < 0, and at t = 0, it is changed to position 2. Assume that the diode has zero voltage drop and a storage time t_S. For 0<t<t_S, the voltage across the 1 KΩ resistor (V_R) in volts is

Solution : https://www.youtube.com/watch?v=-CmgL0d-ztU

7. The majority carriers in an N-type semiconductor have an average drift velocity V in a direction perpendicular to a uniform magnetic field B. The electric field E induced due to hall effect acts in the direction
a. V x B
b. B x V
c. along V
d. opposite to V

Solution : https://www.youtube.com/watch?v=auzgCSNqVcU

8. Find the correct match between Group 1 and Group 2 :

Solution : https://www.youtube.com/watch?v=OkGp1dylZb4

9. A heavily doped N-type semiconductor has the following data:
Hole – electron mobility ratio : 0.4
Doping concentration : 4.2 x 10⁸ /m³
Intrinsic concentration : 1.5 x 10⁴ /m³
The ratio of conductance of the N-type semiconductor to that of the intrinsic semiconductor of same material and at the same temperature is given by
a. 0.00005
b. 2000
c. 10000
d. 20000

Solution : https://www.youtube.com/watch?v=NmYZgSc58Gw

10. For the circuit shown below, assume the zener diode is ideal with a breakdown voltage of 6 volts. The waveform observed across R is

Solution : https://www.youtube.com/watch?v=wjeTnzvlyrw

Post Your Feedback (or) Doubts here.......