Showing posts with label GATE 2008. Show all posts
Showing posts with label GATE 2008. Show all posts

GATE 2008 ECE Network Theory - Complete Video Solutions with Answers

2008


1. In the following graph, the number of trees (P) and the number of cut-sets (Q) are
a) P = 2, Q = 2
b) P = 2, Q = 6
c) P = 4, Q = 6
d) P = 4, Q = 10

Answer: C





2. In the following cirucit, the switch S is closed at t = 0. The rate of change of current di(0+)/dt is given by


Answer: B
Solution:    https://www.youtube.com/watch?v=WiYzbTZyhi0




3. The Thevenin equivalent impedance ZTH between the nodes P and Q in the following circuit is


Answer: A
Solution:     https://www.youtube.com/watch?v=vl6exaG9eY0



4. The driving point impedance of the following network is given as shown. The component values are

Answer: D
Solution:   https://www.youtube.com/watch?v=CI2Na_stYRg




Common Data Questions: 5 & 6
The following series RLC circuit with zero initial conditions is excited by a unit impulse function δ(t).
5. For t > 0, the output voltage Vc(t) is

Answer: D
Solution:   https://www.youtube.com/watch?v=DB4jmdoaFIk




6. For t > 0, the voltage across the resistor is


Answer: B
Solution:    https://www.youtube.com/watch?v=nn6PggFjKgA




Statement for Linked Answer Questions: 7 & 8
A two port network shown below is excited by external DC sources. The voltages and the currents are measured with voltmeters V1, V2 and ammeters A1, A2 (all assumed to be ideal), as indicated. Under following switch conditions, the readings obtained are:


7. The Z-parameter matrix for this network is

Answer: C



8. The h-parameter network for this network is


Answer: A
Solution (7  &  8):      https://www.youtube.com/watch?v=_-paorTBZZg





GATE 2008 ECE Control Systems - Complete Video Solutions with Answers


GATE 2008

1. The pole-zero plot given below corresponds to a

a) Low pass filter
b) High pass filter
c) band pass filter
d) Notch filter


Answer: D




2. Step response of a set of three second order under damped systems all have the same percentage overshoot. Which of the following diagrams represents the poles of the three systems?


Answer:C





3. Group – I lists a set of four transfer functions. Group – II gives a list of possible step responses y(t). Match the step responses with the corresponding transfer functions.
a) P - 3, Q - 1, R - 4, S - 2
b) P - 3, Q - 2, R - 4, S - 1
c) P - 2, Q - 1, R - 4, S - 3
d) P - 3, Q - 4, R - 1, S – 2

Answer:D





4. A certain system has transfer function G(s) = (s + 8)/(s2 + αs – 4 ), where α is a parameter. Consider the standard negative unity feedback configuration shown below.

Which of the following statements is true?
a) The closed loop system is never stable for any value of α
b) For some positive values of α, the closed loop system is stable, but not for all positive values
c) For all positive values of α, the closed loop system is stable
d) The closed loop system is stable for all values of α, both positive and negative


Answer:C




5. A signal flow graph of a system is given below.

The set of equations that correspond to this signal flow graph is


Answer:D




6. The number of open right half plane poles of G(s) = 10 / (s5 + 2s4 + 3s3 + 6s2 + 5s + 3) is
a) 0
b) 1
c) 2
d) 3

Answer:C




7. The magnitude of frequency response of an under damped second order system is 5 at 0 rad/sec and peaks to 10/√3 at 5√2 rad/sec. The transfer function of the system is


Answer:A





8. Group – I gives two possible choices for the impedance Z in the diagram. The circuit elements in Z satisfy the condition R2C2>R1C1. The transfer function Vo/V1 represents a kind of controller. Match the impedance's in Group – I with the types of controllers in Group – II.

a) Q – 1, R – 2
b) Q – 1, R – 3
c) Q – 2, R – 3
d) Q – 3, R – 2

Answer:B
Solution :   https://www.youtube.com/watch?v=Q3O1G2CU5Xw





GATE 2008 ECE Video Solutions on Analog Circuits (Analog Electronics)

1. Consider the following circuit using an ideal OP-AMP. The I-V characteristic of the diode is described by the relation I = Io(exp(V/VT) - 1), where VT = 25 mV, Io = 1 µA and V is the voltage across the diode(taken as positive for forward bias). For an input voltage Vi = - 1 volts, the output voltage Vo is

a. 0 volts
b. 0.1 volts
c. 0.7 volts
d. 1.1 volts
Answer:B
Solution: https://www.youtube.com/watch?v=Hm-AQGstHH0


2. The OP-AMP circuit shown below represents a

a. High pass filter
b. Low pass filter
c. Band pass filter
d. Band reject filter
Answer:B
Solution: https://www.youtube.com/watch?v=iNclgQhX8gs


3. Consider the schmitt trigger circuit shown below.

A triangular wave which goes from –12 volts to +12 volts is applied to the inverting input of OP-AMP. Assume that the output of the OP-AMP swings from +15 volts to –15 volts. The voltage at the non-inverting input switches between
a. – 12 volts and +12 volts
b. – 7.5 volts and +7.5 volts
c. – 5 volts and +5 volts
d. 0 volts and +5 volts
Answer: C
Solution: https://www.youtube.com/watch?v=U1PM8Q0IT0o


Statement for Linked Answer Question:
In the following transistor circuit, VBE = 0.7 volts, re = 25 mV/IE, β and all the capacitances are very large.

4. The value of DC current IE is
a. 1 mA
b. 2 mA
c. 5 mA
d. 10 mA
Answer:A

5. The mid-band voltage gain of the amplifier is approximately
a. – 180
b. – 120
c. – 90
d. – 60
Answer:D
Solution(4 & 5): https://www.youtube.com/watch?v=eX0es1gFdW4

GATE 2008 ECE Video Solution on Digital Circuits (Digital Electronics)

1. An 8085 executes the following instructions
2710 LXI H, 30A0H
2713 DAD H
2714 PCHL
All addresses and constants are in Hexa decimal. Let PC be the contents of the program counter and HL be the contents of HL register pair just after executing PCHL.
Which of the following statements is correct?
a. PC = 2715H and HL = 30A0H
b. PC = 30A0H and HL = 2715H
c. PC = 6140H and HL = 6140H
d. PC = 6140H and HL = 2715H
Answer:C
Solution : https://www.youtube.com/watch?v=YS9fVY4bdn4


2. The logic function implemented by the following circuit at the terminal OUT is

a. P NOR Q
b. P NAND Q
c. P OR Q
d. P AND Q
Answer:D
Solution : https://www.youtube.com/watch?v=cH-YodnqAt4


3. The two numbers represented in signed 2’s compliment form are P = 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2’s compliment form is
a. 100000111
b. 00000111
c. 11111001
d. 111111001
Answer:B
Solution : https://www.youtube.com/watch?v=blIZILSmO8o


4. Which of the following Boolean expression correctly represents the relation between P, Q, R and M1?

Answer:D
Solution : https://www.youtube.com/watch?v=toMIhaj1omc


5. For the circuit shown in the following figure, I0 – I3 are inputs to the 4:1 multiplexer, R(MSB) and S are control inputs. The output Z can be represented by

Answer:A
Solution : https://www.youtube.com/watch?v=WCRHS7QwqYM


6. For each of the positive edge triggered JK flip flop used in the following figure, the propagation delay is ΔT.

Which of the following waveforms correctly represents the output at Q1?

Answer:B
Solution : https://www.youtube.com/watch?v=N7ZYplccPcA


7. For the circuit shown in the figure, D has a transition from 0 to 1 after CLK changes from 1 to 0. Assume gate delays to be negligible.

Which of the following statements is TRUE?
a. Q goes to 1 at the CLK transition and stays at 1
b. Q goes to 0 at the CLK transition and stays at 0
c. Q goes to 1 at the CLK transition and goes to 0 when D goes to 1
d. Q goes to 0 at the CLK transition and goes to 1 when D goes to 1
Answer:C
Solution : https://www.youtube.com/watch?v=FvPG9aLQcHg


Statement for Linked Answer Questions 8 and 9:
In the following circuit, the comparator output is logic ‘1’ if V+ > V- and is logic ‘0’
otherwise. The D/A conversion is done as per the relation.

The counter starts from the clear state.

8. The stable reading of the LED display is
a. 06
b. 07
c. 12
d. 13
Answer:D
9. The magnitude of the error between VDAC and Vin at steady state in volts is
a. 0.2
b. 0.3
c. 0.5
d. 1.0
Answer:B
Solution (8 & 9) : https://www.youtube.com/watch?v=8WEFmNeqxYI

GATE 2008 ECE Video Solutions on EDC (Electronic Devices and Circuits)

1. Which of the following is NOT associated with a PN junction?
a. Junction capacitance
b. Charge storage capacitance
c. Depletion capacitance
d. Channel length modulation

Answer: D
Solution : https://www.youtube.com/watch?v=7kYKPLc5ujM


2. Which of the following is TRUE?
a. A silicon wafer heavily doped with boron is a P+ substrate
b. A silicon wafer lightly doped with boron is a P+ substrate
c. A silicon wafer heavily doped with Arsenic is a P+ substrate
d. A silicon wafer lightly doped with Arsenic is a P+ substrate

Answer: A
Solution : https://www.youtube.com/watch?v=wWLqWJ5JX3U


3. In the following limiter circuit, an input voltage Vi = 10sin100πt applied. Assume that the diode drop is 0.7 volts when it is forward biased. The zener breakdown voltage is 6.8 volts.
The maximum and minimum values of the output voltage respectively are

a. 6.1 volts, -0.7 volts
b. 0.7 volts, -7.5 volts
c. 7.5 volts, -0.7 volts
d. 7.5 volts, -7.5 volts

Answer: C
Solution : https://www.youtube.com/watch?v=2LAYX1bdh5o


4. A silicon wafer has 100nm of oxide on it and is inserted in a furnace at a temperature above 1000oC for further oxidation in dry oxygen. The oxidation rate
a. Is independent of current oxide thickness and temperature
b. Is independent of current oxide thickness but depends on temperature
c. Slows down as the oxide grows
d. Is zero as the existing oxide prevents further oxidation

Answer: A
Solution : https://www.youtube.com/watch?v=6yl7336P2kA


5. The drain current of a MOSFET in saturation is given by ID = K(VGS-VT)2, where K is a constant. The magnitude of the Transconductance gm is
Answer: B
Solution : https://www.youtube.com/watch?v=pYDNlQanv2g


6. For the circuit shown in the following figure, transistors M1 and M2 are identical NMOS transistors. Assume that M2 is in saturation and the output is unloaded. The IX is related to Ibias as

Answer: B
Solution : https://www.youtube.com/watch?v=CBXqcvlx97A


7. The measured Transconductance gm of an NMOS transistor operating in the linear region is plotted against the gate voltage VG at constant drain voltage VD. Which of the following figures represents the expected dependence of gm on VG?

Answer: A
Solution : https://www.youtube.com/watch?v=KE_MLvt-M-4


8. Two identical NMOS transistors M1 and M2 are connected as shown below. Vbias is chosen so that both transistors are in saturation. The equivalent gm of the pair is defined to be dIout / dVi at constant Vout, is

a. The sum of individual gm’s of the transistors
b. The product of individual gm’s of the transistors
c. Nearly equal to the gm of M1
d. Nearly equal to gm1/gm2 of M2

Answer: C
Solution : https://www.youtube.com/watch?v=oySwKD3Vtjg


9. Silicon is doped with boron to a concentration of 4x1017atoms/cm3. Assuming the intrinsic carrier concentration of silicon to be 1.5x1010 cm-3 and the value of KT/q to be 25 mV at 300oK. Compared to undoped silicon, the Fermi level of doped silicon
a. Goes down by 0.13 eV
b. Goes up by 0.13 eV
c. Goes down by 0.427 eV
d. Goes up by 0.427 eV

Answer: C
Solution : https://www.youtube.com/watch?v=B4keN9lEFS8


10. The cross section of a JFET is shown in the figure. Let VG be -2 volts and VP be the initial pinch off voltage. If the width W is doubled (with other geometric parameters and doping levels remaining the same), then the ratio between the mutual Transconductance of the initial and the modified JFET is

Answer: B
Solution : https://www.youtube.com/watch?v=i1HcEXiUqXA


11. Consider the following assertions.
S1: For zener effect to occur, a very abrupt junction is required
S2: For quantum tunneling to occur, a very narrow energy barrier is required.
Which of the following is correct?
a. Only S2 is true
b. Both are true but S2 is not a reason for S1
c. Both are true but S2 is a reason for S1
d. Both are false

Answer: A
Solution : https://www.youtube.com/watch?v=FMoJlAI1-84

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