1. The band gap of silicon at room temperature is
a. 1.3 eV
b. 0.7 eV
c. 1.1 eV
d. 1.4 eV
Solution : https://www.youtube.com/watch?v=Z_suI3Hvt6I
2. A silicon PN junction at a temperature of 20oC has a reverse saturation current of 10 pA. The reverse saturation current at 40oC for the same bias is approximately
a. 30 pA
b. 40 pA
c. 50 pA
d. 60 pA
Solution : https://www.youtube.com/watch?v=is4Hb5QGpHg
3. The primary reason for the widespread use of silicon in semiconductor device technology is
a. Abundance of silicon on the surface of the earth
b. Larger band gap of silicon in comparison to germanium
c. Favorable properties of silicon – dioxide (SiO2)
d. Lower melting point
Solution : https://www.youtube.com/watch?v=6742WDMV-3U
4. A silicon sample A is doped with 1018 atoms/cm3 of boron. Another sample B of identical dimensions is doped with 1018 atoms/cm3 of phosphorous. The ratio of electron to hole mobility is 3. The ratio of conductivity of the sample A to B is
a. 3
b. 1/3
c. 2/3
d. 3/2
Solution : https://www.youtube.com/watch?v=4GDAybGas6c
5. A silicon PN junction diode under reverse bias has depletion region of width of 10 µm. The relative permittivity of silicon (Ԑr) is 11.7 and the permittivity of free space (Ԑo) is 8.85 x 10-12 F/m. The depletion capacitance of the diode per square meter is
a. 100 µF
b. 10 µF
c. 1 µF
d. 20 µF
Solution : https://www.youtube.com/watch?v=rxp_jLO9dz0
6. For NPN transistor connected as shown in figure, VBE = 0.7 volts. Given that the reverse saturation current of the junction at room temperature is 10-13 Amp, then the emitter current is
Solution : https://www.youtube.com/watch?v=3HVbE9qCcH8
7. An N-channel MOSFET and its transfer curve is shown in figure, then the threshold voltage is
Solution : https://www.youtube.com/watch?v=UYrsnu-QIlU
8. The zener diode in the regulator circuit shown has a zener voltage of 5.8 volts and a zener knee current of 0.5 mA. The maximum load current drawn from this circuit ensuring proper functioning over the input voltage range between 20 and 30 volts is
Solution : https://www.youtube.com/watch?v=QxmLyMhJs6g
9. Both transistors T1 and T2 in figure have a threshold voltage of 1 volt. The device parameters K1 and K2 of T1 and T2 are 36 µA/v2 and 9 µA/v2 respectively. The output voltage Vo is
Solution : https://www.youtube.com/watch?v=6fIMwxzffIo
10. A MOS capacitor made using P type substrate is in the accumulation mode. The dominant charge is due to the presence of
a. Holes
b. Electrons
c. Positively charged ions
d. Negatively charged ions
Solution : https://www.youtube.com/watch?v=jlQ_ny0L4C0
a. 1.3 eV
b. 0.7 eV
c. 1.1 eV
d. 1.4 eV
2. A silicon PN junction at a temperature of 20oC has a reverse saturation current of 10 pA. The reverse saturation current at 40oC for the same bias is approximately
a. 30 pA
b. 40 pA
c. 50 pA
d. 60 pA
3. The primary reason for the widespread use of silicon in semiconductor device technology is
a. Abundance of silicon on the surface of the earth
b. Larger band gap of silicon in comparison to germanium
c. Favorable properties of silicon – dioxide (SiO2)
d. Lower melting point
4. A silicon sample A is doped with 1018 atoms/cm3 of boron. Another sample B of identical dimensions is doped with 1018 atoms/cm3 of phosphorous. The ratio of electron to hole mobility is 3. The ratio of conductivity of the sample A to B is
a. 3
b. 1/3
c. 2/3
d. 3/2
5. A silicon PN junction diode under reverse bias has depletion region of width of 10 µm. The relative permittivity of silicon (Ԑr) is 11.7 and the permittivity of free space (Ԑo) is 8.85 x 10-12 F/m. The depletion capacitance of the diode per square meter is
a. 100 µF
b. 10 µF
c. 1 µF
d. 20 µF
6. For NPN transistor connected as shown in figure, VBE = 0.7 volts. Given that the reverse saturation current of the junction at room temperature is 10-13 Amp, then the emitter current is
7. An N-channel MOSFET and its transfer curve is shown in figure, then the threshold voltage is
8. The zener diode in the regulator circuit shown has a zener voltage of 5.8 volts and a zener knee current of 0.5 mA. The maximum load current drawn from this circuit ensuring proper functioning over the input voltage range between 20 and 30 volts is
9. Both transistors T1 and T2 in figure have a threshold voltage of 1 volt. The device parameters K1 and K2 of T1 and T2 are 36 µA/v2 and 9 µA/v2 respectively. The output voltage Vo is
10. A MOS capacitor made using P type substrate is in the accumulation mode. The dominant charge is due to the presence of
a. Holes
b. Electrons
c. Positively charged ions
d. Negatively charged ions
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