GATE 1995 ECE Analog Circuits (Analog Electronics) - Video Solutions

1. A change in the value of the emitter resistance, R_E, in a differential amplifier
a. affects the difference mode gain A_d
b. affects the common mode gain A_c
c. affects both A_d and A_c
d. does not affect both A_d and A_c.

Answer: B

Solution : https://www.youtube.com/watch?v=czxo7TomyPc


2. To obtain very high input and output impedance in a feedback amplifier, the topology mostly used is
a. Voltage Series
b. Current Series
c. Voltage Shunt
d. Current Shunt

Answer: B

Solution : https://www.youtube.com/watch?v=xfuv73dQbBA


3. In the given circuit, if the voltage V₊ and V_{_} are to amplified by the same factor, the value of R should be _________

Answer:33 kΩ

Solution : https://www.youtube.com/watch?v=iyaRnnLhxNI


4. An NPN transistor under forward active mode of operation is biased at I_c = 1 mA, and has a total emitter base capacitance C_K of 12 pF, and the base transit time τ_F of 260 psec. Under this condition, the depletion capacitance of the emitter base junction is _____________

Answer: 2 pF

Solution : https://www.youtube.com/watch?v=faoewgwLY0o


5. An RC coupled amplifier is assumed to have a single pole low frequency transfer function. The maximum lower cutoff frequency allowed for the amplifier to pass 50 Hz square wave with no more than 10% tilt is ______________

Answer: 150 Hz

Solution : https://www.youtube.com/watch?v=Y7Pez6ot4bQ


6. An OP-AMP is used as a zero crossing detector. If the maximum output available from the OP-AMP is ±12 volts peak to peak, and the slew rate of the OP-AMP is 12 V/µsec, then the maximum frequency of the input signal that can be applied without causing a reduction in the peak to peak output is _____________

Answer: 1.59 KHz

Solution : https://www.youtube.com/watch?v=xMs3KYXPxeQ


7. A power amplifier delivers 50W output at 50% efficiency. The ambient temperature is 25^oC. If the maximum allowable junction temperature is 150^oC, then the maximum thermal resistance ø_jc that can be tolerated is __________

Answer:2.5 ^oC/W

Solution : https://www.youtube.com/watch?v=aOpeF9Z9hlQ


8. An amplifier has an open loop gain of 100, and its lower and upper cutoff frequency of 100 Hz and 100 kHz respectively. A feedback network with a feedback factor of 0.99 is connected to the amplifier. The new lower and upper cutoff frequencies are at __________ and ________

Answer: 1 Hz and 10 MHz

Solution : https://www.youtube.com/watch?v=R7lcv_H47gE


9. Match the following:
a) CC amplifier 1) provides voltage gain but no current gain
b) CE amplifier 2) provides current gain but no voltage gain
c) CB amplifier 3) provides neither voltage nor power gain
4) provides neither current nor power gain
5) provides both voltage and current gain

Answer: a-2, b-3, c-1

Solution : https://www.youtube.com/watch?v=6I1uAhJPB10

10. Sketch the output as a function of the input voltage (for negative values) for circuit shown below. Assume ideal operational amplifier and diode forward voltage drop as zero.

Answer:(a) 0 Volts (b) -Vin

Solution: https://www.youtube.com/watch?v=ulb3JFwnZDs


11. The waveform input to the sweep generator circuit shown in figure, is a square wave of period 2 msec and amplitude varying between 0 and 12 volts.

a. Draw the waveform V_o(t), in relation to the input
b. Specify V_o(t) determine the voltage levels and the time constants involved.

Solution: https://www.youtube.com/watch?v=MqLJPriVFVw


12. In the JFET circuit shown, assume that R₁//R₂ = 1 MΩ and the total stray capacitance at the output to be 20 pF.

Determine the upper cutoff frequency of the amplifier.

Answer: 3.18 MHz

Solution: https://www.youtube.com/watch?v=joc09FhNQI8


13. Show that the circuit shown in figure is double integrator. In other words, prove that the transfer gain is given by V_o(s)/V_s(s) = 1/(SCR)², assume ideal operational amplifier.

Solution: https://www.youtube.com/watch?v=kIlrli8NFJ0


14. In the amplifier circuit shown, determine the value of R such that Q₂ is biased at V_CE2 = 7.5 volts. Assume Q₁ and Q₂ to be identical with V_BE = 0.7 volts.

Also determine the small signal input impedance of Q₁ and Q₂, if both of them have β = 200. Use V_T = 26 mV.

Answer: R= 2.72 kΩ, Ri1 < 1 kΩ, Ri2 = 5.65 kΩ

Solution: https://www.youtube.com/watch?v=CiBKrmFWjC8

GATE 1996 ECE Analog Circuits (Analog Electronics) - Video Solutions

1. In the circuit of the given figure, assume that the diodes are ideal and the meter is an average indicating ammeter. The ammeter will read ________

Answer: D

Solution : https://www.youtube.com/watch?v=RrGtXsrXhr0


2. The circuit shown in the figure is that of

a. A Non-inverting amplifier
b. An Inverting amplifier
c. An Oscillator
d. A Schmitt trigger

Answer: D

Solution : https://www.youtube.com/watch?v=CUm0AtZGCJA


3. In the circuit shown, ‘N’ is a finite gain amplifier with a gain of K, large input impedance and very low output impedance. The input impedance of the feedback amplifier with the feedback impedance Z connected as shown will be ______________

Answer: D

Solution : https://www.youtube.com/watch?v=4ISLXf0p9WM


4. A Darlington stage is shown in the figure. If the Transconductance of Q₁ is gm₁ and Q₂ is gm₂, then the overall Transconductance g_mc ≡ [ic^c/v_be^c] is given by

a. gm₁
b. 0.5 gm₁
c. gm₂
d. 0.5 gm₂

Answer: C

Solution : https://www.youtube.com/watch?v=UHqoUnpLM7I


5. Value of R in the oscillator circuit shown in the given figure, so chosen that it just oscillates at an angular frequency of ω. The value of ω and the required value of R will respectively are

a. 10⁵ rad/sec, 2 x 10⁴ Ω
b. 2 x 10⁴ rad/sec, 2 x 10⁴ Ω
c. 2 x 10⁴ rad/sec, 10⁵ Ω
d. 10⁵ rad/sec, 10⁵ Ω

Answer: A

Solution : https://www.youtube.com/watch?v=cf3HdmbWYks


6. A common emitter amplifier with an external capacitors C_C connected across the base and the collector of the transistor is shown. Given g_m = 5 mA/V, r_π = 20 kΩ, C_π = 1.5 pF and C_µ = 0.5 pF.

a. Determine the ac small signal mid band voltage gain, V_o/V_s.
b. Determine the upper cutoff frequency f_H of the amplifier.

Answer: (a) -33.33 (b) 18.326 KHz

Solution: https://www.youtube.com/watch?v=15wQMy8qg8A


7. A resistively loaded and resistively biased differential amplifier circuit is shown. Neglect base current and assume matched transistors with V_A -> ∞ and β = 100. Use V_T = 26 mV, V_BE(on) = 0.7 volts and V_CE(sat) = 0.1 volts.

a. Determine the values of R_C and R_E to meet the following specifications: double ended differential mode gain = 500, CMRR = 500 and differential mode input resistance of 2 MΩ.
b. Determine the minimum values of V_CC and V_EE such that the transistors remain in the forward active region under zero signal condition. Assume that the DC common mode input is zero.

Answer: (a) 5 MΩ, 2.5 MΩ (b) 12.6 Volts, -13.83 Volts

Solution: https://www.youtube.com/watch?v=9zaM7i-wdmI


8. Assuming ideal operational amplifiers, show that the circuit shown simulates in inductor i.e. show that V_i(S)/I_i(S) is inductive and write the expression for the effective inductance.

Answer: L_eff = C.R²

Solution: https://www.youtube.com/watch?v=PJTRIK_taJA

GATE Pratice Questions on "Digital Circuits - 1"

1.       Identify the operation performed by the following circuit, where A and B are 4 bit inputs.

 

2.       Find the modulus of the following asynchronous counter circuit

 

3.       Find the output expression for the following circuit.

 

4.       Identify the operation performed by given sequential circuit.

 

5.       Minimize the following circuit and realize the circuit using only minimum number of 2 input NAND gates

 

6.       Find the combinational logic expression realized by the given MUX.

 

7.       Find the relation between CLKA and CLK and also between CLKB and CLK.

 

8.       Find the output for different values of inputs as shown for the given JK flip flop.

 

9.       Determine the resulting serial data that appear on the output ‘Q’. Assume there is one clock pulse for each bit time, Q is initially zero and preset and clear inputs are HIGH initially. Rightmost bits are applied first.

 

10.   Find the modulus of the following synchronous counter.

 

11.   Find the relation between clock frequency and output frequency at Q.

 

12.   An AB flip-flop is shown for all possible input combinations. Write the truth table of the flip-flop.

 

GATE practice Problems on PN junction (Diode) Set - 2

1.       An ideal silicon PN junction has a reverse saturation current of 0.1 µA at a temperature of 125^oC. Find the dynamic resistance at 105^oC when the diode is forward biased with 0.8 volts.

2.       An ideal germanium diode at room temperature has a static resistance of 4.57 Ω at a point, where the current flowing is 43.8 mA. Find the dynamic resistance for a forward bias of 0.1 volt.

3.       For an alloy silicon PN junction with N_A << N_D, calculate depletion layer capacitance (C_T), if the resistivity of P-material is 4 Ω-cm, the barrier height V_o = 0.3 volts, applied reverse voltage is 4 volts and the cross sectional area is circular of 50 mills in diameter.

4.       Find the resistivity of the P-type material in a silicon PN junction, where cross sectional area is circular and of 40 mils in diameter and the transition capacitance is 61 pF. The given barrier height is 0.35 volts and the applied reverse voltage is 5 volts.

5.       For a silicon P⁺N junction with N_D = 10¹⁵ atoms per cm³ and the built in potential of 0.5 volts. Find the transition capacitance per square mil, if the applied reverse voltage is 10 volts.

6.       The transition capacitance of an abrupt PN junction is 10 pF at 4 volts. Find the decrease in capacitance for a 0.5 volts increase in bias.

7.       For a silicon PN junction with N_A = N_D = 10²¹ atoms per m³ and n_i = 9.8 x 10¹⁵ atoms per m³. Calculate transition capacitance, if the area is 1 mm² and the junction is reverse biased with 10 volts.

8.       Find static and dynamic resistances of a PN junction germanium diode for an applied forward bias of 0.2 volts, if the temperature is 300^oK and reverse saturation current of 1 µA.

9.       Find the Diffusion capacitance of a silicon diode with N_A >> N_D, when carrying a current of 1 mA. Assume diffusion length of holes i 0.026 cm.

10.   The zero barrier height of an alloy silicon PN⁺ junction is 0.6 volts and acceptor concentration is 5 x 10¹⁶ atoms per cm³. Find space charge capacitance for an applied reverse voltage of 5.6 volts, if the cross sectional area is 1 mm².

11.   For a silicon P⁺N junction, find the current flowing through the junction, if the diffusion length is 2.6 µm and diffusion capacitance is 1 nF.

12.   Calculate the barrier capacitance of a germanium PN junction, whose area is 0.5 mm X 0.5 mm and space charge thickness, is 3 x 10^-4 cm.

13.   In the given figure, the V-I characteristics of the diode is given as I = 0.2(V – 1)^1/2 for V ≥ 1 else zero. Find the current ‘I’ indicated.

 

14.   For the circuit shown, assume the drop across conducting diode is 0.7 volts. Find V_o if V₁ = 10 volts and V₂ = 5 volts.

 

15.   For the circuit shown, Find the voltage drop across diode D₁, if V₁ = 5 volts and V₂ = 0 volts. Assume ideal diodes.

 

16.   For the circuit shown, assume that the silicon diode requires a minimum current of 1 mA to be above the knee of its I-V characteristic.

a.       What should be the value of R to establish 5 mA in the circuit?

b.      With the value of R calculated, what is the minimum value of voltage E, such that the diode current is above the knee point.

 

17.   For the circuit shown, assume that the silicon diode is biased above its knee and has a bulk resistance of 0.1 Ω. Find the total current in and total voltage across the diode. Sketch the current versus time.

 

18.   Determine which diodes are forward biased and which are reverse biased in each of the configurations shown in figure.

 

19.   Determine which diodes are forward biased and which are reverse biased in the circuits shown. Assume a 0.7 volts drop across each forward biased diode, determine the output voltage also.

 

20.   A diode conducts a current of 440 nA form cathode to anode, when the reverse biasing voltage across it is 8 volts. What is the diode resistance?

 

21.   For the circuit shown, the current I is 34.28 mA. What is the voltage drop across the diode and also find its DC resistance?

22.   For the circuit shown, assume that the voltage drop across a forward biased silicon diode is 0.7 volts and that across a germanium diode is 0.3 volts.

a.       If D₁ and D₂ are both silicon diodes, find the current I in the circuit.

b.      Find the current I in the circuit, if D₁ is silicon and D₂ is germanium.

 

23.   In the circuit shown below, assume the diode is germanium. Find the percent error caused by neglecting the voltage drop across the diode, when calculating the current I in the circuit. Assume voltage drop across forward biased germanium diode is 0.3 volts.

24.   In the circuit shown, the diode has 0.65 volts drop across it.

a.       Find the DC current in the diode

b.      Find ac resistance of the diode at room temperature

c.       Find total current in and total voltage across the diode

d.      What are the minimum and maximum values of current flowing through the diode?

 

25.   In the circuit shown, the voltage source is a square wave whose output alternates between + 2.5 volts and – 2.5 volts. Find the peak voltage across and current through the resistor, if the diode is germanium and R = 330 Ω.

26.   Determine which of the following diodes are forward biased and which are reverse biased.

27.   Determine which of the following diodes are forward biased and which are reverse biased.

28.   In the circuit shown, the inputs A and B can be either 0 volts or +10 volts. Each diode is silicon and has resistance 400 Ω when it is forward biased. Find V_o for all four possible combinations of A and B.

29.   In circuit shown, the inputs A, B and C can be either +10 volts or –5 volts. Each diode is silicon and has a resistance of 1200Ω when it is forward biased. Find V_o, when

a.       A = B = C = -5 volts

b.      A = B = C = +10 volts

c.       A = C = -5 volts and B = +10 volts

d.      A = B = +10 volts and C = -5 volts

30.   In the circuit shown, the inputs A and B can be either 0 volts or -5 volts. Assuming that the forward voltage of the diode is 0.7 volts, find V_o for all possible combinations of A and B.